Senior Staff Engineer Analog Mixed-Signal Design (f/m/div) - Villach
$43,440 - $59,730 USD yearly
Originally posted 9 September 2026 by the employer — open 1 day.
About the role
This role involves leading end-to-end ADC design, from architecture definition to silicon bring-up. The position focuses on high-performance converters like SAR, Pipeline, Sigma-Delta, Flash, or hybrid topologies.
What you'll do
- Lead end-to-end ADC design, including architecture definition, circuit implementation, and silicon bring-up.
- Design critical analog/mixed-signal building blocks such as OTAs, comparators, DACs, sample-and-hold circuits, references, and clocking/bias circuits.
- Drive comprehensive pre-silicon verification through transistor-level to chip-level simulations, Monte Carlo, corner, and worst-case analyses.
- Perform post-silicon lab characterization and debug.
- Develop behavioral and architectural models of ADC and mixed-signal blocks using Python and/or MATLAB for system-level simulation.
What you'll need
- M.Sc. or Ph.D. in Electrical Engineering, Microelectronics, or a related field.
- 5+ years of industry experience in analog and mixed-signal IC design.
- Proven track record of successful silicon tape-outs and product bring-up.
- Deep expertise in one or more ADC architectures (SAR, Pipeline, Sigma-Delta, Flash, or hybrid topologies).
- Expertise in analog building blocks such as OTAs, comparators, references, LDOs, and switched-capacitor circuits.
- Solid understanding of mixed-signal design including clock distribution, digital calibration, timing closure, and asynchronous logic.
- Proficiency with EDA tools (Cadence Virtuoso/Spectre, ADE XL, HSPICE, or equivalent) and the full custom IC design flow.
- Experience with advanced CMOS process nodes (e.g., 130nm–12nm).
- Skills in Python and/or MATLAB/Simulink for automation, scripting, and system-level modeling.
- Knowledge of digital calibration techniques.
Skills: ADC design, circuit implementation, silicon bring-up, analog/mixed-signal building blocks, pre-silicon verification, post-silicon lab characterization
This role has been open 1 day — well below the 79-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
173
|
Median days open
79 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Infineon Technologies | All employers we track in this specialty (173 roles · 44 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 173 |
| Open roles in the wider Analog & Mixed-Signal family | 69 | 1317 · 100 employers |
| Median days open | 71 d | 79 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: ADC design, circuit implementation, silicon bring-up, analog/mixed-signal building blocks, pre-silicon verification, post-silicon lab characterization
Who's hiring in this category
- Analog Devices · 25 open roles · median 117 d
- Infineon Technologies (this employer) · 14 open roles · median 71 d
- NVIDIA · 12 open roles · median 51 d
- SiTime · 11 open roles · median 169 d
- Qualcomm · 10 open roles · median 55 d
- Microchip Technology · 8 open roles · median 168 d
How we counted: 173 open Mixed-Signal Design (Mixed Signal) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.