Senior SOC Timing Engineer - Penang 15, Penang, Malaysia
Originally posted 29 September 2026 by the employer.
This role focuses on timing closure and signoff for FPGA/SoC.
About the role
This role is responsible for timing closure and signoff of FPGA/SoC and Subsystem timing. You will be involved in static timing analysis and providing interface timing constraints.
What you'll do
- Be responsible for timing closure and signoff of FPGA/SoC and Subsystem timing.
- Conduct static timing analysis.
- Provide and derive interface timing constraints to partitions.
- Perform final timing signoff.
- Work with design and architecture teams for timing convergence analysis.
- Collaborate with the physical design team for timing closure.
What you'll need
- Proficient in physical design industry standard EDA tools such as Primetime/PTPX.
- Good knowledge of physical design and PNR flow.
- Experience in timing signoff in 10nm or lower technology.
- BE/MS/PhD in Electronics/Electrical Engineering.
- 10+ Years’ experience in timing closure and signoff.
Skills: timing closure, timing signoff, static timing analysis, Primetime/PTPX, PNR flow
This role has been open 0 days — well below the 64-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
627
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (627 roles · 79 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 627 |
| Open roles in the wider Physical Implementation family | 31 | 1420 · 109 employers |
| Median days open | 64 d | 64 d (same as this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: timing closure, timing signoff, static timing analysis, Primetime/PTPX, PNR flow
Who's hiring in this category
- Qualcomm · 114 open roles · median 40 d
- AMD · 44 open roles · median 28 d
- Broadcom · 40 open roles · median 78 d
- NVIDIA · 38 open roles · median 53 d
- Synopsys · 27 open roles · median 56 d
- NXP Semiconductors · 25 open roles · median 77 d
How we counted: 627 open Physical Design (Physical Design) roles from 79 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.