Senior Principal Engineer, SerDes Transmitter
$261,000 - $297,000 USD yearly
Originally posted 22 October 2026 by the employer.
About the role
Upscale AI is seeking a Senior Principal Engineer to lead the design and development of SerDes transmitter circuits for high-speed interconnects.
What you'll do
- Lead the architecture, design, and implementation of high-speed SerDes transmitter circuits focusing on performance, power efficiency, and silicon robustness.
- Drive transmitter clock generation, distribution, and timing optimization, including multiphase clocking, phase alignment, jitter management, and clock-to-data timing.
- Lead the design and optimization of high-speed DACs and time-interleaved DAC calibration techniques addressing timing skew, gain and offset mismatch, and nonlinearities.
- Lead the design of high-speed output drivers using both current-mode and voltage-mode architectures, optimizing output swing, impedance matching, and linearity.
- Develop circuit techniques using passive elements and networks, including inductive peaking and impedance shaping, to achieve high-frequency bandwidth extension.
- Apply electromagnetic simulation and extraction tools such as Cadence EMX or Ansys HFSS to analyze and optimize passive structures, interconnects, and coupling.
What you'll need
- MS or PhD in Electrical Engineering or a related field, with substantial experience in high-speed analog and mixed-signal IC design.
- Hands-on experience designing high-speed SerDes transmitters or comparable transmit circuits.
- Demonstrated expertise in transmitter clocking, high-speed DACs, output drivers, or transmitter architectures.
- Understanding of high-speed circuit design principles, including bandwidth limitations, parasitic effects, jitter, noise, impedance matching, and signal integrity.
- Experience with advanced CMOS process technologies and implementing high-speed circuits in scaled technology nodes.
- Proficiency in circuit simulation, design optimization, custom layout collaboration, and silicon debug and characterization.
Nice to have
- Direct experience developing 100+G-per-lane SerDes transmitters.
- Expertise in time-interleaved DAC architectures and calibration techniques for high-speed transmitters.
- Experience with both current-mode and voltage-mode output driver architectures, including bandwidth, linearity, output swing, power, and termination trade-offs.
- Understanding of passive circuit design for bandwidth extension, including inductors, transformers, transmission lines, and resonant networks.
- Hands-on proficiency with electromagnetic simulation and extraction tools such as Cadence EMX, Ansys HFSS, or PeakView.
- Experience optimizing clock distribution, multiphase clock generation, and sampling or switching-clock quality.
Skills: SerDes transmitter, high-speed IO, TX architecture, AI hardware
More semiconductor jobs: Signal integrity jobs · California jobs
This role has been open 17 days — well below the 66-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
256
|
Median days open
66 d
|
Category median salary (all employers)
$207k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Upscale AI | All employers we track in this specialty (256 roles · 51 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 256 |
| Open roles in the wider Analog & Mixed-Signal family | 10 | 1540 · 115 employers |
| Median days open | 16 d | 66 d (−50 d vs this employer) |
| Median salary (USD postings) | — | $207k |
Skills observed across this category: SerDes transmitter, high-speed IO, TX architecture, AI hardware
Who's hiring in this category
- Synopsys · 39 open roles · median 38 d
- AMD · 22 open roles · median 45 d
- Cadence Design Systems · 21 open roles · median 153 d
- NVIDIA · 17 open roles · median 214 d
- Qualcomm · 16 open roles · median 87 d
- Apple · 11 open roles · median 3 d
How we counted: 256 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 51 employers tracked in the SemiconductorJobs index, counted 9 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.