Skip to main content
Avicena

Senior/Principal Analog Mixed-Signal Design Engineer, Optical Receiver

Avicena Sunnyvale, CA, United States Full-time 2 hours ago
Analog & Mixed-Signal Design

High-speed parallel optical links built from arrays of microLED transmitters and photodetector receivers.

About the role

Avicena is seeking an analog mixed-signal engineer to design receiver front-ends for high-speed parallel optical links built from microLED transmitters and photodetector receivers. The role owns circuits from specification through post-layout signoff and silicon correlation.

What you'll do

  • Design and simulate receiver circuits including photodetector interfaces, transimpedance amplifiers, limiting and post-amplifiers, equalization, comparators, slicers, offset cancellation, and signal detection.
  • Analyze noise, bandwidth, sensitivity, crosstalk, and power per lane across PVT corners and Monte Carlo.
  • Design calibration and trim circuits, and define their control interface with the digital team.
  • Collaborate with layout on floorplans, matching, and parasitic-sensitive routing for dense receiver arrays, and execute post-layout extraction and verification.
  • Deliver behavioral models in Verilog-A or real-number models and correlate them with transistor-level results.
  • Support silicon bring-up and correlate measurements with simulation results.

What you'll need

  • MS or PhD in Electrical Engineering (or BS with equivalent experience) and 5+ years of analog/mixed-signal design experience.
  • Track record of taped-out high-speed receiver circuits such as TIAs, CTLEs, limiting amplifiers, or comparators for optical or wireline links.
  • Design experience in FinFET or other advanced CMOS processes.
  • Proficiency with Cadence Virtuoso and Spectre, including noise, AC, transient, and Monte Carlo analysis.
  • Experience taking blocks through post-layout extraction and signoff.

Nice to have

  • Experience with optical receivers or photodiode interfaces.
  • Experience with multi-Gb/s wireline receivers or arrays of parallel lanes.
  • Behavioral modeling in Verilog-A or SystemVerilog real-number models.
  • Hands-on lab characterization experience.
  • Experience with MATLAB or Python for analysis and automation.
  • 10+ years of experience with technical leadership of receiver designs through production.

Skills: TIA, optical receiver, FinFET, Cadence Virtuoso, Spectre, post-layout signoff

More semiconductor jobs: Mixed-signal design jobs · Sunnyvale jobs

Apply now
Sunnyvale, CA, United States
On-site
Full-time
2 hours ago

Share this job