Senior Analog Design Engineer – Power & Clock IP
Develop power management and clocking IP for Treo-based SoCs.
About the role
This role involves developing power management and clocking IP for Treo-based SoCs as a hands-on technical contributor. You will take ownership of complex analog blocks while collaborating across design, verification, and validation teams.
What you'll do
- Design, simulate, and verify analog IP including LDOs, DC/DC converters, charge pumps, PLLs, DLLs, and oscillators.
- Own analog blocks through the complete lifecycle from specification through silicon validation.
- Perform schematic design, layout review, post-layout verification, and corner analysis.
- Use industry-standard schematic capture and SPICE/AMS simulation tools to perform PVT, noise, jitter, reliability, and aging analysis for design sign-off.
- Collaborate with digital, validation, and technology teams during integration, bring-up, lab characterization, and post-silicon debugging.
- Apply scripting and automation techniques to improve design efficiency and develop reusable IP methodologies.
What you'll need
- 5+ years of experience in analog IC design.
- Experience designing power management and/or clocking circuits.
- Solid understanding of analog circuit design, device physics, and layout effects.
- Proficiency with SPICE/AMS simulation and mixed-signal verification.
- Demonstrated ability to work independently and communicate technical issues effectively.
Nice to have
- Experience with Verilog-A/AMS modeling.
- Exposure to automotive or industrial applications.
- Interest in AI-assisted design and automation workflows.
Skills: LDO, DC/DC, PLL, SPICE, analog IP
More semiconductor jobs: onsemi jobs · Analog design jobs · Texas jobs
This role has been open 0 days — well below the 75-day median for Analog IC Design roles.
Analog IC Design · Power Management
|
Open roles in category
89
|
Median days open
75 d
|
Category median salary (all employers)
$181k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (89 roles · 11 employers) |
|---|---|---|
| Open roles in this specialty | 22 | 89 |
| Open roles in the wider Analog & Mixed-Signal family | 54 | 1483 · 106 employers |
| Median days open | 75 d | 75 d (same as this employer) |
| Median salary (USD postings) | — | $181k |
Skills observed across this category: LDO, DC/DC, PLL, SPICE, analog IP
Who's hiring in this category
- Renesas Electronics · 25 open roles · median 54 d
- onsemi (this employer) · 20 open roles · median 75 d
- Monolithic Power Systems · 10 open roles · median 171 d
- Skyworks · 8 open roles · median 7 d
- Texas Instruments · 8 open roles · median 67 d
- Analog Devices · 6 open roles · median 13 d
How we counted: 89 open Analog IC Design (Power Management) roles from 11 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.