Senior Physical Design Engineer
Originally posted 2 November 2026 by the employer.
About the role
This role involves handling physical design and implementation flows across synthesis, place and route, timing closure, and sign-off. The work supports fabric solutions for single-die and multi-chiplet systems.
What you'll do
- Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing and power closure, EM/IR, PDV, and final PD sign-off.
- Own physical design and implementation of high-performance designs from block level to system level components.
- Collaborate with micro-architects to explore performance, power, and area trade-offs for high performance and low power designs.
- Conduct physical implementation feasibility studies and design recommendations for optimal PPA.
- Develop methodologies and recipes for various stages of physical implementation.
- Perform physical design validation (PDV) flows including timing, power, EM/IR, design rule checking (DRC), and layout versus schematic (LVS) checks.
What you'll need
- BS or MS in Electrical Engineering, Computer Engineering, or a related degree.
- Experience across physical design phases including synthesis, floor planning, place and route, clock tree synthesis, power grid implementation, timing closure, power closure, and EM/IR.
- Experience with EDA tools including static timing analysis, PDV tools, Synopsys Design Compiler, PrimeTime, ICC, or Fusion Compiler.
- Experience with scripting for physical design flow automation.
- Understanding of modern sub-7nm technology nodes and device physics.
- Knowledge of high-performance and low-power microarchitecture, logic design principles, SoC architecture, and SystemVerilog RTL coding.
Skills: RTL to GDS, place and route, timing closure, DRC, LVS
More semiconductor jobs: Physical design jobs · Santa Clara jobs
This role has been open 0 days — well below the 62-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
690
|
Median days open
62 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Baya Systems | All employers we track in this specialty (690 roles · 83 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 690 |
| Open roles in the wider Physical Implementation family | 3 | 1558 · 110 employers |
| Median days open | 0 d | 62 d (−62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL to GDS, place and route, timing closure, DRC, LVS
Who's hiring in this category
- Qualcomm · 107 open roles · median 55 d
- AMD · 60 open roles · median 35 d
- Broadcom · 43 open roles · median 66 d
- NVIDIA · 42 open roles · median 79 d
- Synopsys · 41 open roles · median 34 d
- Intel Corporation · 31 open roles · median 25 d
How we counted: 690 open Physical Design (Physical Design) roles from 83 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.