Senior Package Layout Engineer - Canada
$105,000 - $122,000 CAD yearly
Originally posted 28 October 2026 by the employer.
Focus on multi-layer substrate, 2.5D, and 3D IC layouts within the Signal Integrity Products business unit.
About the role
Semtech is seeking a Package and PCB Layout Engineer to join the R&D hardware design team within the Signal Integrity Products business unit. This role contributes high-speed designs across interconnect technologies supporting 2D, 2.5D, and 3D IC configurations.
What you'll do
- Perform package design feasibility assessments for signal integrity experts in conjunction with manufacturing and thermo-mechanical engineering teams.
- Develop multi-layer substrate and carrier layouts to support 2D, 2.5D, and 3D IC configurations.
- Develop wafer-level interconnect layouts using wafer redistribution layers and wafer reconstruction technologies.
- Work in parallel with cross-functional internal teams while coordinating with local and international suppliers.
What you'll need
- Bachelor’s degree in engineering, physics, or another relevant discipline.
- 5 years of layout experience in high-speed package and/or advanced PCB technologies.
- Solid knowledge of high-speed layout and electronic design.
- Advanced knowledge of EDA layout tools.
- Familiarity with PCB layout, as well as mechanical, thermal, and optical design.
- Understanding of RF, analog, and digital circuits.
Nice to have
- Advanced knowledge of Cadence APD and Allegro.
- Knowledge of AI design acceleration features in EDA layout tools.
- Additional degrees or certifications in mechatronics, photonics, or electronics manufacturing.
- Familiarity with interconnect configurations including chip-on-board, wirebond, flip-chip, optical assembly, and high-speed connectors.
- Familiarity with industry standards such as JEDEC and IPC.
- Experience troubleshooting PCBs and systems.
Skills: package layout, 2.5D, 3D IC, RDL, Cadence APD, Allegro
More semiconductor jobs: Advanced packaging jobs
This role has been open 0 days — well below the 49-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
78
|
Median days open
49 d
|
Median salary
$171k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Semtech | All employers we track in this specialty (78 roles · 26 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 78 |
| Median days open | 17 d | 49 d (−32 d vs this employer) |
| Median salary (USD postings) | — | $171k |
Skills observed across this category: package layout, 2.5D, 3D IC, RDL, Cadence APD, Allegro
Who's hiring in this category
- AMD · 12 open roles · median 36 d
- Micron Technology · 10 open roles · median 180 d
- NVIDIA · 7 open roles · median 30 d
- Marvell Technology · 6 open roles · median 26 d
- Broadcom · 4 open roles · median 151 d
- GlobalFoundries · 4 open roles · median 119 d
How we counted: 78 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 26 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.