Senior Mask Layout Design Engineer
Originally posted 1 September 2026 by the employer — open 9 days.
Join a team responsible for high-speed mixed-signal circuit designs.
About the role
This role involves physical layout for high-speed mixed-signal circuit designs, working with ASIC and mixed-signal engineers on VLSI products. You will be performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in sub-micron CMOS technologies.
What you'll do
- Perform physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs.
- Customize designs for integration in VLSI products.
- Take part in floor planning, custom layout.
- Verify designs against design rules and schematics.
What you'll need
- BSEE or equivalent experience.
- 5+ years of experience in Mask and Layout Design.
- Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
- Expertise with Cadence custom circuit design tools, particularly Virtuoso.
- Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.
- Proficient in scripting languages like perl, python, skill.
- Knowledge of DRC and LVS checking flows, and ability to customize decks.
Skills: mask layout, Cadence Virtuoso, DRC, LVS, mixed-signal, SerDes
This role has been open 9 days — below the 14-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
30
|
Median days open
14 d
|
Median salary
—
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (30 roles · 19 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 30 |
| Open roles in the wider Analog & Mixed-Signal family | 31 | 1317 · 100 employers |
| Median days open | 9 d | 14 d (−5 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: mask layout, Cadence Virtuoso, DRC, LVS, mixed-signal, SerDes
Who's hiring in this category
- Celero · 4 open roles · median 1 d
- Infineon Technologies · 3 open roles · median 29 d
- QORVO · 3 open roles · median 13 d
- Marvell Technology · 2 open roles · median 5 d
- Monolithic Power Systems · 2 open roles · median 15 d
- onsemi · 2 open roles · median 15 d
How we counted: 30 open Analog IC Design (Analog Layout) roles from 19 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.