Senior Mask Design Engineer - Karlin, Czechia, Czech Republic
Physical Design & EDA
About the role
Analog Bits is seeking a Senior Mask Design Engineer to execute physical layout design for mixed-signal IP. The focus is on developing advanced low-power, high-speed Fin-FET mixed-signal and analog IPs used in data center and consumer SoCs.
What you'll do
- Deliver mask and layout design for high-speed, low-power analog and mixed-signal IPs.
- Implement physical design solutions across advanced Fin-FET process nodes.
- Develop custom physical implementations for integrated circuits deployed in high-performance data center SoCs and low-power consumer SoCs.
What you'll need
- Experience in mask design and layout design for analog and mixed-signal IP.
- Hands-on experience working with Fin-FET process technologies.
- Background in physical layout implementation for high-speed or low-power circuits.
Skills: layout design, Fin-FET, DRC, LVS, floor-planning, power distribution network