$136,000 - $258,750 USD yearly
About the role
This role involves end-to-end validation of High-Speed IO (HSIO) for NVIDIA products, driving system-level debug from bring-up to full-scale production. This position focuses on validating PCIe, NVLink, C2C, Ethernet, USB, DP, HDMI, and CXL interfaces across protocol, link, and physical layers.
What you'll do
- Own HSIO validation, including test plan development, automation, and bug resolution.
- Validate high-speed interfaces like PCIe, NVLink, C2C, Ethernet, USB, DP, HDMI, CXL across protocol, link, and physical layers.
- Bring up new hardware platforms and debug complex board- and system-level issues.
- Review board schematics, PCB layouts, and BOM, providing development and component feedback.
- Drive signal integrity characterization, link tuning, and margin analysis.
- Define HSIO functionality test coverage from link bring-up through stress and corner-case scenarios.
What you'll need
- BS+ in EE/CE or equivalent experience.
- 3+ years of post-silicon HSIO validation or system bring-up experience.
- Ability to work on site in a hardware lab environment 5 days a week.
- Solid understanding of at least one high-speed interface protocol: PCIe, NVLink, C2C, Ethernet, USB, CXL, Display, or SerDes/signal integrity at the PHY level.
- Hands-on experience with lab equipment such as high-bandwidth DSOs, BERTs, protocol/logic analyzers, protocol exercisers, and TDR.
- Proven system-level debug skills on complex hardware platforms.
Skills: high-speed interfaces, PCIe, NVLink, CXL, Ethernet, protocol, link, physical layers, signal integrity characterization, lab equipment
This role has been open 93 days — slightly above the 89-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
215
|
Median days open
89 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | Market (215 open roles · 44 companies) |
|---|---|---|
| Open roles in category | 10 | 215 |
| Median days open | 94 d | 89 d (+5 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: high-speed interfaces, PCIe, NVLink, CXL, Ethernet, protocol, link, physical layers, signal integrity characterization, lab equipment
Who's hiring in this category
- AMD · 24 open roles · median 60 d
- Cadence Design Systems · 19 open roles · median 152 d
- Qualcomm · 18 open roles · median 68 d
- Synopsys · 16 open roles · median 52 d
- Broadcom · 11 open roles · median 141 d
- Micron Technology · 9 open roles · median 126 d
Based on 215 open roles at 44 companies in our index. Snapshot 9 Sept 2026.