Senior FPGA Prototyping Platform Engineer
Work with Synopsys Protocompiler and Xilinx Vivado to build FPGA prototypes of GPUs and SOCs.
Originally posted 2 June 2026 by the employer. Relisted by the employer on 31 October 2026.
About the role
This role is for a Senior FPGA Prototyping Platform Engineer on the Emulation team in Santa Clara, CA, responsible for building FPGA prototypes of GPUs and SOCs on standard FPGA prototyping platforms.
What you'll do
- Build FPGA prototypes by taking the design through synthesis and place and route, analyzing timing, and generating bitstreams.
- Bring up designs on FPGA prototyping platforms using hands-on lab debug with hardware and software debuggers.
- Release prototypes to customers and provide ongoing support to address issues.
- Use hardware diagnostics specific to prototyping platforms to isolate issues between the hardware platform and programmed FPGA design.
- Coordinate with verification engineers, software teams, and lab technicians to accomplish platform deliverables.
What you'll need
- BS in Electrical Engineering, Computer Engineering, or related field with 7+ years of experience in FPGA prototyping, or MS with 5+ years of experience.
- Understanding of FPGA prototyping hardware architecture, flows, and tools.
- Experience with hands-on FPGA prototyping lab tasks and working with or managing lab technicians in medium-to-large-scale lab environments.
- Experience in backend flows of FPGA prototyping, including synthesis, P&R, and timing closure, with emphasis on Synopsys Protocompiler and Xilinx Vivado.
- Hands-on experience with lab FPGA debug methodologies, tools (Identify and/or ChipScope), and lab debug equipment (oscilloscopes, logic/protocol analyzers).
Nice to have
- Experience carrying out independent and collaborative debug tasks with the ability to quickly triage and root-cause issues.
- Prior experience prototyping high-performance processors or SOCs using Synopsys HAPS or FPGA platforms.
More semiconductor jobs: NVIDIA jobs · RTL design jobs · California jobs
This role has been open 150 days — well above the 58-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1050
|
Median days open
58 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1050 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 1050 |
| Open roles in the wider Digital Design & Verification family | 257 | 3355 · 114 employers |
| Median days open | 67 d | 58 d (+9 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 142 open roles · median 67 d
- Synopsys · 87 open roles · median 44 d
- AMD · 81 open roles · median 45 d
- NXP Semiconductors · 44 open roles · median 99 d
- Analog Devices · 42 open roles · median 46 d
- Intel Corporation · 34 open roles · median 22 d
How we counted: 1050 open Digital/RTL Design (RTL Design) roles from 99 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.