Senior Engineer, Node Development PE - Boise, ID - Main Site, United States
Originally posted 17 September 2026 by the employer.
About the role
This role focuses on introducing new DRAM nodes into production, owning yield ramp, cost efficiency, and quality improvements at the ID1 fab.
What you'll do
- Lead new node startup, qualification, yield ramp, and production readiness.
- Guide development teams on process integration using deep technical insight.
- Analyze yield data and electrical failures to drive measurable improvements.
- Partner with Design, TD, Quality, and Test teams to resolve yield and performance issues.
- Use statistical tools and lab analysis to identify root causes and optimize processes.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
- Familiarity with DRAM architecture, operation, testing, and process integration.
- Understanding of CMOS fundamentals and performance characteristics.
- Strong problem-solving and analytical skills.
- Effective written and verbal communication skills.
Nice to have
- Experience supporting high-volume semiconductor manufacturing environments.
- Knowledge of yield analysis, failure analysis, and product characterization techniques.
- Experience using CAD tools, simulations, and statistical analysis methods.
Skills: DRAM node development, yield ramp, cost efficiency, quality improvements, electrical failures
This role has been open 20 days — well below the 63-day median for Product Engineering roles.
Product Engineering · Memory Design
|
Open roles in category
93
|
Median days open
63 d
|
Median salary
$154k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (93 roles · 13 employers) |
|---|---|---|
| Open roles in this specialty | 60 | 93 |
| Open roles in the wider Silicon Validation & Test family | 213 | 2207 · 110 employers |
| Median days open | 75 d | 63 d (+12 d vs this employer) |
| Median salary (USD postings) | — | $154k |
Skills observed across this category: DRAM node development, yield ramp, cost efficiency, quality improvements, electrical failures
Who's hiring in this category
- Micron Technology (this employer) · 58 open roles · median 77 d
- SanDisk · 14 open roles · median 47 d
- KIOXIA America · 5 open roles · median 15 d
- Cadence Design Systems · 4 open roles · median 192 d
- OmniVision · 2 open roles · median 148 d
- Solidigm · 2 open roles · median 27 d
How we counted: 93 open Product Engineering (Memory Design) roles from 13 employers tracked in the SemiconductorJobs index, counted 7 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.