Senior Engineer, Design Verification
$138,000 - $206,000 USD yearly
Originally posted 13 November 2026 by the employer.
About the role
Lead the verification for IP blocks of an AI accelerator within the AGI Computing Lab.
What you'll do
- Develop verification infrastructure and automation environments for build, simulation, regression, and triages.
- Lead verification for IP blocks of an AI accelerator in collaboration with architects and RTL engineers.
- Create direct and random testbenches, define verification scope and test plans for functional and performance validation, and close verification quality metrics.
- Provide comprehensive documentation of verification strategy and ensure the test environment is accessible.
- Work cross-functionally to debug failures with design, compiler, and simulation engineers, and mentor junior engineers when necessary.
What you'll need
- Bachelor's degree with 5+ years, Master's with 3+ years, or PhD with 0+ years of industry experience.
- Background in SoC or IP verification and testbench development using UVM, SystemVerilog, C/C++, and scripting languages such as Perl or Python.
- Experience verifying at multiple levels of logic from scratch, spanning complex IP blocks, dies, SoCs, and full system testing.
- Strong RTL comprehension and debugging skills.
- Background in microarchitecture and computer architecture, preferably in the area of AI accelerators.
Nice to have
- Prior experience with computational logic, interconnect networks, or memory systems.
- Knowledge of FPGA and emulation platforms.
Skills: UVM, SystemVerilog, AI accelerator, testbench, simulation
More semiconductor jobs: Samsung Semiconductor jobs · Verification engineer jobs · San Jose jobs
First seen in our index 0 days ago, well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1395
|
Median days since first seen
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (1395 roles · 100 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 1395 |
| Open roles in the wider Digital Design & Verification family | 14 | 3618 · 122 employers |
| Median days since first seen | 86 d | 59 d (−27 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: UVM, SystemVerilog, AI accelerator, testbench, simulation
Who's hiring in this category
- Qualcomm · 129 open roles · median 52 d
- NVIDIA · 109 open roles · median 73 d
- Apple · 107 open roles · median 16 d
- AMD · 82 open roles · median 63 d
- Synopsys · 80 open roles · median 57 d
- SiFive · 57 open roles · median 71 d
How we counted: 1395 open Design Verification (Design Verification) roles from 100 employers tracked in the SemiconductorJobs index, counted 13 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.