Senior Engineer- DEG Layout - Bengaluru, India
Analog & Mixed-Signal Design
Originally posted 21 July 2026 by the employer — open 51 days. Relisted by the employer on 21 July 2026.
About the role
This role involves the layout design and development of critical analog, mixed-signal, custom digital blocks, standard cells, and full chip level designs.
What you'll do
- Perform layout design and development for analog, mixed-signal, custom digital blocks, standard cells, and full chip levels.
- Execute layout verification including LVS, DRC, Antenna, Shield, Matching, Latch-up, and EM IR Totem checks.
- Develop digital block layouts using auto placement and route tools.
- Guide and review sub-block level layouts by developing team members.
- Contribute to project management and communicate with global engineering teams.
- Reduce layout effort by utilizing AI tools.
What you'll need
- 5 to 8 years of experience in analog/custom layout design in advanced CMOS process.
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
- Hands-on experience creating layouts of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier.
- Good understanding of Analog Layout fundamentals including Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices.
- Ability to understand design constraints and implement high-quality layouts.
- Problem-solving skills in physical verification of custom layout.
Skills: layout design, LVS, DRC, Cadence VLE/VXL, analog layout
Market context
This role has been open 138 days — well above the 66-day median for Analog IC Design roles.
Analog IC Design · Analog Design
|
Open roles in category
259
|
Median days open
66 d
|
Median salary
$156k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (259 roles · 46 employers) |
|---|---|---|
| Open roles in category | 33 | 259 |
| Median days open | 45 d | 66 d (−21 d vs this employer) |
| Median salary (USD postings) | — | $156k |
Skills observed across this category: layout design, LVS, DRC, Cadence VLE/VXL, analog layout
Who's hiring in this category
- Micron Technology (this employer) · 33 open roles · median 45 d
- Texas Instruments · 30 open roles · median 111 d
- NXP Semiconductors · 15 open roles · median 65 d
- Renesas Electronics · 14 open roles · median 53 d
- onsemi · 13 open roles · median 111 d
- Semtech · 11 open roles · median 83 d
How we counted: 259 open Analog IC Design (Analog Design) roles from 46 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.