Senior Digital Design Engineer - High-Speed I/O and Photonics
Originally posted 30 October 2026 by the employer. Relisted by the employer on 31 October 2026.
About the role
This role involves front-end development, backend design, and post-silicon bring-up for high-speed DSPs, silicon photonics IPs, and chips within the mixed-signal high-speed I/O group. The team develops PHY designs for copper and fiber channels supporting NVLINK, Ethernet, and InfiniBand protocols, including 200G MRM-based silicon photonics chips.
What you'll do
- Define chip-level features, programming models, and application interfaces in collaboration with analog designers and system architects.
- Develop micro-architecture specifications, calibration routines, and adaptation algorithms, translating them into RTL and firmware designs.
- Define and build synthesis constraints, drive timing closure, and evaluate PPA trade-offs based on synthesis and P&R feedback.
- Participate in silicon bring-up and develop testing scripts for debugging, characterization, performance tuning, and production.
- Collaborate with cross-functional teams to ensure successful production ramp.
What you'll need
- B.S. or M.S. degree in Electrical Engineering or equivalent experience.
- 5+ years of experience in high-speed digital design, proficient with front-end design flows and tools.
- Deep understanding of Verilog or SystemVerilog, logic design concepts, and typical circuit structures.
- Solid understanding of design for test, timing constraints, and static timing analysis.
- Experience with industry verification methodologies, such as UVM.
More semiconductor jobs: NVIDIA jobs · RTL design jobs · California jobs
This role has been open 144 days — well above the 58-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1050
|
Median days open
58 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1050 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 1050 |
| Open roles in the wider Digital Design & Verification family | 257 | 3354 · 114 employers |
| Median days open | 67 d | 58 d (+9 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 142 open roles · median 67 d
- Synopsys · 87 open roles · median 44 d
- AMD · 81 open roles · median 45 d
- NXP Semiconductors · 44 open roles · median 99 d
- Analog Devices · 42 open roles · median 46 d
- Intel Corporation · 34 open roles · median 22 d
How we counted: 1050 open Digital/RTL Design (RTL Design) roles from 99 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.