Senior DFT Methodology - Data Analytics and Applied AI Engineer - CA, Santa Clara, United States
Originally posted 3 August 2026 by the employer.
About the role
This role focuses on pre-silicon and post-silicon data analytics, visualization, insights, and modeling for Design-for-Test (DFT) engineering.
What you'll do
- Work with pre-silicon and post-silicon data analytics, visualization, insights, and modeling. - Design and uphold data pipelines and ETL processes for the ingestion and processing of DFX engineering data from various origins. - Collaborate with cross-functional teams (execution, analytics, data science, product) to define data requirements and ensure data quality and consistency. - Address complex problems in the Design-for-Test domain using algorithm design, statistical analysis tools, and Applied AI methods. - Develop and deploy DFT methodologies using Gen AI solutions. - Mentor junior engineers on test designs and trade-offs, including cost and quality.
What you'll need
- BSEE (or equivalent experience) with 5+, MSEE with 3+, or PhD with 1+ years of experience in low-power DFT, Data Visualization, Applied Machine Learning, or Database Management. - Experience with SQL, ETL, and data modeling. - Hands-on experience with cloud platforms such as AWS, Azure, or GCP. - Experience designing and implementing scalable, fault-tolerant distributed database solutions, including data modeling, performance tuning, and capacity planning. - Knowledge in using statistical tools for data analysis and insights. - Programming and scripting skills in Perl, Python, C++, or Tcl.
This role has been open 82 days — well above the 58-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
251
|
Median days open
58 d
|
Median salary
$206k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (251 roles · 54 employers) |
|---|---|---|
| Open roles in this specialty | 21 | 251 |
| Open roles in the wider Digital Design & Verification family | 227 | 3352 · 116 employers |
| Median days open | 46 d | 58 d (−12 d vs this employer) |
| Median salary (USD postings) | — | $206k |
Who's hiring in this category
- AMD · 36 open roles · median 50 d
- Qualcomm · 25 open roles · median 83 d
- NVIDIA (this employer) · 21 open roles · median 47 d
- NXP Semiconductors · 19 open roles · median 42 d
- Synopsys · 16 open roles · median 32 d
- Micron Technology · 10 open roles · median 76 d
How we counted: 251 open DFT Engineering (DFT Test) roles from 54 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.