Senior Design Verification (DV) Engineer
$150,000 - $220,000 USD yearly
About the role
This role is responsible for developing and verifying digital silicon IP from concept through bring-up in collaboration with Architecture, Micro-architecture, Physical Design, and Software teams. This is a full-time, on-site position based in Sunnyvale, CA requiring presence in the office 5 days a week.
What you'll do
- Develop, optimize, and verify digital silicon IP using an existing C or Python model.
- Create and maintain specifications, block diagrams, and detailed documentation and user guides.
- Characterize the performance of digital silicon IP using industry standard tools and flows, including FPGA simulation and emulation.
What you'll need
- At least 10 years of experience in Design Verification.
- Experience leading a team of Design Verification Engineers.
- Hands-on experience taking digital silicon IP from concept to bring-up.
- Bachelor's or Master's degree in Electrical Engineering.
Nice to have
- Experience with Synopsys tools and advanced node processes (below 12nm).
- Startup experience.
- Government clearance.
Skills: Design Verification Engineers, digital silicon IP, C or Python model, FPGA simulation, emulation
More semiconductor jobs: Verification engineer jobs · Sunnyvale jobs
This role has been open 199 days — well above the 58-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1345
|
Median days open
58 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Bolt Graphics | All employers we track in this specialty (1345 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 1345 |
| Open roles in the wider Digital Design & Verification family | 16 | 3525 · 120 employers |
| Median days open | 141 d | 58 d (+83 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Design Verification Engineers, digital silicon IP, C or Python model, FPGA simulation, emulation
Who's hiring in this category
- Qualcomm · 117 open roles · median 52 d
- Apple · 113 open roles · median 11 d
- NVIDIA · 105 open roles · median 72 d
- AMD · 85 open roles · median 68 d
- Synopsys · 74 open roles · median 52 d
- SiFive · 57 open roles · median 66 d
How we counted: 1345 open Design Verification (Design Verification) roles from 99 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.