Senior Circuit Methodology Engineer
$196,000 - $310,500 USD yearly
Originally posted 12 May 2026 by the employer. Relisted by the employer on 31 October 2026.
About the role
This role works closely with NVIDIA's circuit design engineering team to provide infrastructure support for circuit design and methodology. You will own and evolve compute and GPU infrastructure in coordination with Farm, IT, CAD, and GPU infrastructure teams to support mixed-signal design and verification flows.
What you'll do
- Design, develop, and maintain circuit design and verification flows running on large-scale compute and GPU farms across geographies using job schedulers.
- Monitor farm health and job behavior, identify bottlenecks, and implement solutions to improve throughput, utilization, and turnaround time.
- Bring up, release, evaluate, and qualify new compute and GPU infrastructure, schedulers, and related EDA infrastructure components.
- Build automation and tooling to streamline flow setup, job submission, resource allocation, logging, and reporting.
- Track metrics including utilization, queue times, and failure rates to lead farm efficiency and cost-effectiveness improvement projects.
- Debug flow, infrastructure, and job-scheduling issues, root-cause failures, implement permanent fixes, and maintain documentation and training materials.
What you'll need
- BSEE, BSCE, or equivalent experience.
- 8+ years of working experience related to circuit design methodology using Cadence or Synopsys-based systems (Virtuoso or Custom Compiler).
- Mid-level programming skills, primarily in Python and Perl.
- Experience with job schedulers and compute farms, primarily LSF and Slurm.
- Proven ability to debug complex multi-layer issues spanning flows, scripts, tools, and infrastructure.
Skills: farm health, compute and GPU infrastructure, job schedulers, EDA infrastructure, automation and tooling
More semiconductor jobs: NVIDIA jobs · EDA tools engineer jobs · California jobs
This role has been open 171 days — well above the 60-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
717
|
Median days open
60 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (717 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 40 | 717 |
| Open roles in the wider Physical Implementation family | 97 | 1554 · 112 employers |
| Median days open | 122 d | 60 d (+62 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: farm health, compute and GPU infrastructure, job schedulers, EDA infrastructure, automation and tooling
Who's hiring in this category
- Cadence Design Systems · 155 open roles · median 156 d
- Synopsys · 58 open roles · median 47 d
- Micron Technology · 47 open roles · median 44 d
- Renesas Electronics · 37 open roles · median 8 d
- Keysight Technologies · 34 open roles · median 86 d
- Qualcomm · 34 open roles · median 81 d
How we counted: 717 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.