Senior ATE Test Engineer - San Diego, California, United States
$125,000 - $180,000 USD yearly
Originally posted 10 July 2026 by the employer.
About the role
The Senior ATE Test Engineer leads the development and execution of test solutions for precision analog and mixed-signal integrated circuits from first silicon through high-volume manufacturing. Focus areas include precision DACs, current source/sink products, PMICs, and analog interface ICs.
What you'll do
- Develop complete production test solutions for wafer sort and final test using Teradyne UltraFlex IGXL and associated handlers and probers. - Correlate bench measurements with ATE results and establish production test limits using statistical analysis and characterization data. - Develop and optimize production test programs for precision DACs, current source/sink products, PMICs, and analog interface ICs. - Design, debug, and validate load boards, probe cards, sockets, and production hardware in collaboration with external vendors. - Drive multisite optimization, parallel testing, throughput improvement, and overall manufacturing cost reduction. - Transfer products into OSAT and high-volume manufacturing while delivering production release documentation, GR&R studies, and guard-banding analysis.
What you'll need
- Bachelor’s degree in Electrical Engineering or a related field. - 6+ years of experience in semiconductor test engineering, ideally with analog or mixed-signal ICs. - Experience with Teradyne UltraFlex and/or Verigy SmartScale or PinScale platforms. - Understanding of analog testing principles and methodologies. - Experience with vector translation tools such as Velocity or Test Insight. - Familiarity with scan testing, JTAG, memory BIST, and loopback techniques.
This role has been open 102 days — well above the 33-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
556
|
Median days open
33 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Elevate Semiconductor | All employers we track in this specialty (556 roles · 77 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 556 |
| Open roles in the wider Silicon Validation & Test family | 2 | 2229 · 113 employers |
| Median days open | 102 d | 33 d (+69 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Who's hiring in this category
- Teradyne · 79 open roles · median 27 d
- Renesas Electronics · 44 open roles · median 27 d
- Infineon Technologies · 43 open roles · median 41 d
- Micron Technology · 28 open roles · median 37 d
- Qualcomm · 28 open roles · median 33 d
- Texas Instruments · 24 open roles · median 28 d
How we counted: 556 open Silicon Test Engineering (DFT Test) roles from 77 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.