Senior Analog IC Layout Engineer - Seoul (Jung-gu), South Korea
Originally posted 20 July 2026 by the employer — open 52 days.
Work on Analog IC Layout for Automotive Power Solutions.
About the role
This role involves leading the physical implementation of complex mixed-signal and power management integrated circuits within the Central Layout Group, focusing on Automotive Power Solutions (APS).
What you'll do
- Lead the physical implementation of Analog and Mixed-Signal integrated circuits.
- Define and optimize floorplans for complex blocks and top-level assemblies.
- Drive layout activities from planning through tape-out.
- Own DRC, LVS, ERC and physical sign-off activities.
- Support extraction analysis and post-layout verification.
- Mentor junior engineers and contribute to layout methodology improvements.
What you'll need
- Bachelor or Master Degree in Electrical Engineering, Electronics, Physics or Microelectronics.
- Strong experience in Analog IC Layout development.
- Expertise with Cadence Virtuoso Layout environment.
- Experience with DRC/LVS sign-off methodologies.
- Solid understanding of CMOS, BCD, SOI and Mixed-Signal design environments.
- Fluent written and spoken English.
Nice to have
- Experience with Calibre, PVS, Quantus, StarRC or equivalent EDA tools.
- Experience with automotive semiconductor products.
- Knowledge of High Voltage technologies.
- Experience in layout automation and scripting (SKILL, Python, TCL or Shell).
- Previous mentoring or technical leadership experience.
Skills: Analog IC Layout, Cadence Virtuoso, DRC/LVS sign-off, CMOS, Mixed-Signal
This role has been open 52 days — well below the 66-day median for Analog IC Design roles.
Analog IC Design · Analog Design
|
Open roles in category
259
|
Median days open
66 d
|
Median salary
$156k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (259 roles · 46 employers) |
|---|---|---|
| Open roles in category | 15 | 259 |
| Median days open | 65 d | 66 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $156k |
Skills observed across this category: Analog IC Layout, Cadence Virtuoso, DRC/LVS sign-off, CMOS, Mixed-Signal
Who's hiring in this category
- Micron Technology · 33 open roles · median 45 d
- Texas Instruments · 30 open roles · median 111 d
- NXP Semiconductors (this employer) · 15 open roles · median 65 d
- Renesas Electronics · 14 open roles · median 53 d
- onsemi · 13 open roles · median 111 d
- Semtech · 11 open roles · median 83 d
How we counted: 259 open Analog IC Design (Analog Design) roles from 46 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.