Senior Analog Design Engineer - Richardson, TX, United States
Originally posted 16 September 2026 by the employer — open 0 days.
Design high-performance analog power management ICs.
About the role
This Senior Analog Design Engineer role involves driving architecture, design, and validation of analog power ICs for QORVO's Power Management division.
What you'll do
- Design and develop high-performance analog power management ICs.
- Define product architecture and specifications with system engineers.
- Select and implement optimal circuit topologies.
- Conduct transistor-level design, simulation, and validation.
- Collaborate with layout engineers to optimize floor planning and parasitic.
- Partner with test and characterization engineers to define validation methodologies and troubleshoot design issues.
What you'll need
- Master's degree in Electrical Engineering.
- 3+ years of engineering experience in analog and/or mixed-signal Integrated circuit (IC) design.
- Experience working in Electronic Design Automation (EDA) tools such as EMIR tools, capacitive coupling tools and flows, parasitic extraction tools, and floating nodes.
Nice to have
- PhD in Electrical Engineering.
- Experience with Cadence Virtuoso, Simplis, and ADS.
- Hands-on lab experience supporting high frequency switching power supplies in the semiconductor power management industry.
- Experience with production release of power management ICs.
Skills: analog power management ICs, transistor-level design, circuit topologies, layout engineers, simulation, Cadence Virtuoso
This role has been open 0 days — well below the 78-day median for Analog IC Design roles.
Analog IC Design · Power Management
|
Open roles in category
89
|
Median days open
78 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (89 roles · 16 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 89 |
| Open roles in the wider Analog & Mixed-Signal family | 80 | 1322 · 103 employers |
| Median days open | 20 d | 78 d (−58 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: analog power management ICs, transistor-level design, circuit topologies, layout engineers, simulation, Cadence Virtuoso
Who's hiring in this category
- Renesas Electronics · 23 open roles · median 82 d
- onsemi · 16 open roles · median 77 d
- Monolithic Power Systems · 9 open roles · median 180 d
- QORVO (this employer) · 8 open roles · median 31 d
- Infineon Technologies · 7 open roles · median 75 d
- Analog Devices · 6 open roles · median 111 d
How we counted: 89 open Analog IC Design (Power Management) roles from 16 employers tracked in the SemiconductorJobs index, counted 16 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.