RFIC Layout Engineer - Irvine, United States

Originally posted 27 October 2026 by the employer.

About the role

As an RFIC Layout Engineer on the Wireless SoC Radio Team, you will deliver custom layouts for CMOS radios spanning RF to bits in advanced CMOS technology nodes. The scope covers RF, analog, and mixed-signal blocks including RF front-end amplifiers, data converters, baseband filters, phase-locked loops, crystal oscillators, and bandgap references.

What you'll do

- Implement custom RF, analog, and mixed-signal layouts for integrated radio transceivers in advanced CMOS nodes. - Execute layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing. - Address physical effects including RC delay, electromigration, coupling, guard rings, DNW, and PN junctions. - Mitigate advanced process effects such as length of diffusion (LOD) and well proximity effect (WPE). - Perform physical verification and interpret CALIBRE DRC, ERC, and LVS results.

What you'll need

- Bachelor's degree. - Direct experience with FinFET technology.

Nice to have

- Experience in custom RF/analog layout for radio transceivers with knowledge of deep sub-micron CMOS. - Proficiency in CALIBRE DRC, ERC, and LVS in FinFET technology. - Knowledge of Cadence layout tools. - Scripting skills in PERL or SKILL.

Skills: RF layout, FinFET, Calibre DRC, LVS, Cadence, transceiver