$150,000 - $350,000 USD yearly
Apply machine learning to power, performance, and area tradeoffs across digital design flows in the ChipAgents platform.
Originally posted 4 November 2026 by the employer.
About the role
ChipAgents is hiring Research Engineers to apply machine learning to electronic design automation (EDA). You will own research projects targeting power, performance, and area tradeoffs across the chip design flow and integrate successful results into the ChipAgents platform.
What you'll do
- Lead research projects applying machine learning to power, performance, and area problems in chip design, from problem definition to production.
- Build datasets and benchmarks from EDA tool flows across various designs and technologies.
- Design, train, and evaluate ML models on hardware design data.
- Form hypotheses, establish baselines, and distinguish improvements from benchmark noise.
- Work with engineering and product teams to integrate research models into the ChipAgents platform.
- Write maintainable, well-architected research code for collaborative engineering workflows.
What you'll need
- MS or PhD in Computer Science, Electrical or Computer Engineering, or a related field, or equivalent research experience in industry.
- Hands-on experience designing, training, and debugging deep learning models in PyTorch or similar platforms.
- Working knowledge of the digital design flow, spanning RTL, synthesis, place and route, timing analysis, and power analysis.
- Experience running and scripting commercial or open-source EDA tools.
- Python software engineering skills for building structured research code bases.
Nice to have
- Publications at EDA venues (DAC, ICCAD, MLCAD, ISPD) or ML venues (NeurIPS, ICML, ICLR).
- Prior work applying machine learning to EDA or chip design problems.
- Experience with ML on graphs or structured data.
- Industry experience in physical design, timing closure, or power analysis.
- Experience with LLMs or agent systems.
- Experience running large-scale training or data generation on compute clusters.
Skills: machine learning, EDA, PyTorch, digital design flow, RTL, synthesis, place and route
More semiconductor jobs: EDA tools engineer jobs
This role has been open 0 days — well below the 26-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
90
|
Median days open
26 d
|
Category median salary (all employers)
$209k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | ChipAgents | All employers we track in this specialty (90 roles · 27 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 90 |
| Open roles in the wider Physical Implementation family | 5 | 1580 · 117 employers |
| Median days open | 9 d | 26 d (−17 d vs this employer) |
| Median salary (USD postings) | — | $209k |
Skills observed across this category: machine learning, EDA, PyTorch, digital design flow, RTL, synthesis
Who's hiring in this category
- NVIDIA · 12 open roles · median 38 d
- NXP Semiconductors · 10 open roles · median 93 d
- Keysight Technologies · 8 open roles · median 35 d
- Cadence Design Systems · 6 open roles · median 69 d
- Qualcomm · 6 open roles · median 9 d
- Synopsys · 6 open roles · median 13 d
How we counted: 90 open EDA/CAD Engineering (AI EDA Design) roles from 27 employers tracked in the SemiconductorJobs index, counted 4 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.