Engineer I - Software
$70,304 - $143,000 USD yearly
Develop static timing analysis and power modeling software for Microchip's FPGA design suite.
Originally posted 5 November 2026 by the employer.
About the role
The Microchip FPGA Software Engineering team develops EDA software for modeling and evaluating FPGA performance in terms of speed and power consumption. In this R&D role, you will develop performance evaluation algorithms, focusing on timing and power sign-off tools.
What you'll do
- Design, develop, test, debug, and maintain static timing analysis software.
- Model complex electronic digital components, including high-speed IOs.
- Develop software solutions supporting very large graph representations.
- Optimize architecture processing and analysis for run-time and memory footprint.
- Integrate capabilities into internal flows to evaluate future FPGA architectures and participate in R&D exploration of OCV, SSTA, and IR Drop.
- Perform design reviews, unit testing, and code reviews while maintaining product features and providing customer support.
What you'll need
- Bachelor's in Computer Science, Electrical Engineering, or Computer Engineering.
- 0-3 years of experience in a related field.
- Strong knowledge of C++, as well as an understanding of algorithms and data structures.
- Experience with shell scripting languages including Python, Bash, or TCL.
Nice to have
- Master's in Computer Science, Electrical Engineering, or Computer Engineering.
- Experience with source code management systems including Git, Bitbucket, and Jira.
- Exposure to parallel programming techniques, like TBB.
- Familiarity or experience with FPGA architectures, AI/ML-driven applications, or AI-based code development.
Skills: static timing analysis, C++, algorithms, EDA, FPGA
More semiconductor jobs: Microchip Technology jobs · EDA tools engineer jobs
This role has been open 0 days — well below the 66-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
723
|
Median days open
66 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Microchip Technology | All employers we track in this specialty (723 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 723 |
| Open roles in the wider Physical Implementation family | 29 | 1583 · 117 employers |
| Median days open | 47 d | 66 d (−19 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: static timing analysis, C++, algorithms, EDA, FPGA
Who's hiring in this category
- Cadence Design Systems · 158 open roles · median 161 d
- Synopsys · 59 open roles · median 54 d
- Micron Technology · 48 open roles · median 42 d
- NVIDIA · 41 open roles · median 100 d
- Renesas Electronics · 38 open roles · median 13 d
- Qualcomm · 34 open roles · median 86 d
How we counted: 723 open EDA/CAD Engineering (EDA Tools) roles from 78 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.