Product Application Engineer PCIe/CXL - San Jose, California, United States
$185,000 - $240,000 USD yearly
Originally posted 19 August 2026 by the employer.
About the role
This role provides technical guidance to customers, generates collateral, and provides feedback for product improvement, specifically for the Asia region.
What you'll do
- Provide technical guidance to customers to overcome design challenges.
- Generate collateral for existing and new products.
- Support the development and design-in of semiconductor products for PCIe/CXL.
- Coordinate with local development teams in Astera Labs Headquarters.
What you'll need
- Strong academic and technical background in electrical engineering.
- Minimum of 3 years’ experience designing in complex SoC/silicon products with a high speed interface (preferably PCIe).
- Full professional proficiency in Mandarin (written and spoken).
- Strong working knowledge of PCIe LTSSM at a physical layer level, associated standards, and debug, with recent experience with PCIe 5.0.
- Silicon/system bring-up and debug experience in customer systems.
- Firsthand experience with lab equipment such as protocol analyzers/exercisers, high-speed oscilloscopes, or BERTs.
- Comfort working with software/firmware associated with semiconductor products, including firmware development with C-language, and scripting with Python or other equivalent programming languages.
Nice to have
- Experience with PCIe 6.0/CXL.
- Triaging complex customer reported issues across multiple layers (silicon, firmware, hardware board design, system environment).
- Experience with common data center BMC implementation and BIOS configuration.
- Development/support for PCIe or Ethernet Switch or Retimer products.
- PCIe compliance testing methodology and troubleshooting.
- Understanding of Data Center systems like Servers, JBOGs/JBODs, Networking switches/routers/interconnects.
Skills: PCIe/CXL, technical guidance, design-in, silicon/system bring-up, protocol analyzers
This role has been open 40 days — well below the 52-day median for Applications FAE roles.
Applications FAE · Serdes Highspeed
|
Open roles in category
78
|
Median days open
52 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (78 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 15 | 78 |
| Median days open | 49 d | 52 d (−3 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: PCIe/CXL, technical guidance, design-in, silicon/system bring-up, protocol analyzers
Who's hiring in this category
- Astera Labs (this employer) · 15 open roles · median 49 d
- Synopsys · 14 open roles · median 13 d
- Qualcomm · 7 open roles · median 73 d
- Keysight Technologies · 6 open roles · median 31 d
- Broadcom · 4 open roles · median 59 d
- Microchip Technology · 4 open roles · median 44 d
How we counted: 78 open Applications FAE (Serdes Highspeed) roles from 23 employers tracked in the SemiconductorJobs index, counted 28 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.