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Synopsys

R&D Engineering, Sr engineer

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Taipei, Taiwan 18 days ago
Physical Design & EDA

Originally posted 17 September 2026 by the employer — open 1 day.

This role is part of the Physical Verification R&D team.

About the role

This role involves developing software programs for the semiconductor industry. You will be a member of the Physical Verification R&D team, focusing on the design of efficient data structures and algorithms to solve problems posed by advanced technology nodes.

What you'll do

  • Write efficient and stable software programs in C/C++ for Unix/Linux environments.
  • Keep up with advancements in IC design and methodology.
  • Develop software tools used by major hardware companies worldwide.
  • Design efficient data structures and algorithms to solve problems posed by advanced technology nodes.
  • Deliver high-quality production software that meets customer needs.
  • Produce design documents based on product requirements.

What you'll need

  • Proficiency in developing and maintaining C/C++ based applications in a Unix/Linux environment.
  • Experience with the software development lifecycle.
  • Proficiency with debugging and configuration management tools.
  • Attention to strict performance and quality requirements.
  • BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering.

Nice to have

  • Knowledge of VLSI design flow and methodology.
  • Prior experience in the EDA industry.
  • Familiarity with GPU programming.

Skills: C++, Unix/Linux, VLSI design flow, EDA industry, physical verification R&D

Market context

This role has been open 0 days — well below the 86-day median for EDA/CAD Engineering roles.

EDA/CAD Engineering · EDA Tools

Open roles in category
680
Median days open
86 d
Median salary
$197k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Synopsys compares in EDA/CAD Engineering hiring
Metric Synopsys All employers we track in this specialty (680 roles · 73 employers)
Open roles in this specialty 55 680
Open roles in the wider Physical Implementation family 87 1388 · 105 employers
Median days open 57 d 86 d (−29 d vs this employer)
Median salary (USD postings) — $197k

Skills observed across this category: C++, Unix/Linux, VLSI design flow, EDA industry, physical verification R&D

Who's hiring in this category

  • Cadence Design Systems · 173 open roles · median 141 d
  • Synopsys (this employer) · 52 open roles · median 58 d
  • NVIDIA · 50 open roles · median 90 d
  • Micron Technology · 36 open roles · median 119 d
  • Qualcomm · 36 open roles · median 72 d
  • Intel Corporation · 29 open roles · median 23 d

How we counted: 680 open EDA/CAD Engineering (EDA Tools) roles from 73 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Taipei, Taiwan
On-site
18 days ago

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