Product Engineer (Yield & Quality) - USA-Arizona, United States
Originally posted 9 January 2026 by the employer.
Support N5/N4 chip performance, yield, and quality engineering at TSMC Arizona's 5-nanometer fab.
About the role
TSMC Arizona is looking for a Product Engineer responsible for early-stage design, yield window performance, and root cause identification for chip performance. The role supports N5 and N4 technologies at the 5-nanometer fab in Phoenix, Arizona.
What you'll do
- Analyze CP test bin and data logs to identify failure modes for N5/N4 chip performance, yield, and quality issues. - Conduct electrical failure analysis and physical failure analysis to locate suspect process stages. - Collaborate with the Fab integration team or process team to define corrective actions and trace implementation effectiveness. - Support product early-stage design to facilitate product tape-out and silicon success through design rule review and assessment. - Perform layout review or DFM to enlarge the manufacturing window. - Execute yield window characterization and identify device sweet spots for optimal yield and performance process conditions.
What you'll need
- Master’s Degree in Electrical Engineering. - Legal authorization to work in the United States. - Ability to travel and train in Taiwan for 6 to 9 months. - Ability to work effectively within cross-functional teams.
Nice to have
- Working knowledge of semiconductor physics, CMOS device operation, and advanced semiconductor manufacturing. - Familiarity with digital circuit design.
Skills: yield issues, quality issues, CP test bin, electrical failure analysis, design rule review, product tape-out
This role has been open 163 days — well above the 57-day median for Product Engineering roles.
Product Engineering · Yield Engineering
|
Open roles in category
107
|
Median days open
57 d
|
Median salary
$158k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | TSMC Arizona | All employers we track in this specialty (107 roles · 34 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 107 |
| Open roles in the wider Silicon Validation & Test family | 4 | 2238 · 112 employers |
| Median days open | 163 d | 57 d (+106 d vs this employer) |
| Median salary (USD postings) | — | $158k |
Skills observed across this category: yield issues, quality issues, CP test bin, electrical failure analysis, design rule review, product tape-out
Who's hiring in this category
- Micron Technology · 14 open roles · median 74 d
- Infineon Technologies · 11 open roles · median 31 d
- Texas Instruments · 11 open roles · median 73 d
- Renesas Electronics · 9 open roles · median 26 d
- onsemi · 8 open roles · median 52 d
- AMD · 5 open roles · median 64 d
How we counted: 107 open Product Engineering (Yield Engineering) roles from 34 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.