Product Engineer - Santa Clara, California, United States
$156,853 - $160,000 USD yearly
Originally posted 3 February 2026 by the employer.
Support new product introduction and yield ramp-up for CMOS Image Sensors (CIS) and ASIC products from tape-out to mass production.
About the role
This role supports the new product introduction and ramp-up of CMOS Image Sensors (CIS) and ASIC products from initial tape-out to mass production.
What you'll do
- Collaborate with design, test, reliability, and packaging teams to troubleshoot issues and support product development. - Perform design rule checks, product validation, process criteria definition, and GDS checks for tape-out. - Develop product characterization and testing plans with R&D and foundry teams, and assess pixel performance through statistical analysis of electrical and functional metrics at wafer- and chip-level testing. - Drive yield enhancement, process optimization, and defect reduction through physical and electrical failure analysis. - Work with test engineers to develop, verify, and release CP and FT testing programs, performing sensor validation on manual testing boards. - Ensure products meet AEC Q-100 standards and other automotive specifications while partnering with foundries on CIP and BKM updates.
What you'll need
- Master’s degree in Electrical Engineering, Physics, Material Science, or a related field. - One year of experience in product engineering. - Experience supporting IC-design clients in ramping up new tape out (NTO) products, sustaining yields for high-volume production, and improving product quality and functionality. - Experience performing design rules checks and layout review to ensure robust product design. - Experience monitoring CP and FT testing results to gate and resolve issues in mass production. - Experience with physical failure analysis techniques, including TEM, EDX, and OBIRCH. - Experience in raw materials, production processes, quality control, costs, and manufacturing techniques.
Skills: failure analysis, process optimization, defect reduction, CP and FT testing, yield enhancement
This role has been open 191 days — well above the 57-day median for Product Engineering roles.
Product Engineering · Yield Engineering
|
Open roles in category
105
|
Median days open
57 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | OmniVision | All employers we track in this specialty (105 roles · 34 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 105 |
| Open roles in the wider Silicon Validation & Test family | 11 | 2235 · 112 employers |
| Median days open | 189 d | 57 d (+132 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: failure analysis, process optimization, defect reduction, CP and FT testing, yield enhancement
Who's hiring in this category
- Micron Technology · 14 open roles · median 75 d
- Infineon Technologies · 11 open roles · median 32 d
- Texas Instruments · 11 open roles · median 74 d
- Renesas Electronics · 9 open roles · median 27 d
- onsemi · 8 open roles · median 53 d
- NXP Semiconductors · 5 open roles · median 93 d
How we counted: 105 open Product Engineering (Yield Engineering) roles from 34 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.