Principal Test Engineer & Lab Manager - Denver, CO, United States
$100,000 - $500,000 USD yearly
Originally posted 3 August 2026 by the employer.
Qorvo is seeking a Principal Test Engineer & Lab Manager to work on phased array antenna and RF hardware.
About the role
As Principal Test Engineer & Lab Manager, you will manage antenna lab operations and lead assembly, bring-up, and testing of phased array antenna and RF hardware for mission-critical Defense & Aerospace products.
What you'll do
- Manage antenna lab facilities, equipment, supplies, physical organization, and day-to-day test priorities.
- Maintain vector network analyzers, signal generators, chamber setups, positioner systems, and ensure range calibration.
- Design and execute test plans for phased array antennas, active and passive RF/mmWave components, and RF hardware.
- Lead assembly, bring-up, troubleshooting, and testing of arrays, circuits, and RF designs.
- Develop advanced testing techniques to verify IC, circuit, and phased array antenna module performance, including EVM, ACLR, EIS, and out-of-band emissions.
- Take ownership of existing test software configuration control and automate test software over time.
What you'll need
- Bachelor’s degree in Electrical Engineering (BSEE) or equivalent with a minimum of 5 years of experience, preferably with active electronics.
- Deep knowledge of phased array systems, RF measurements, and automated testing.
- Experience testing active and passive antenna systems and active and passive RF/mmWave components.
- Understanding of RF test methods, including operation and calibration methodologies for network analyzers, spectrum analyzers, and noise figure meters.
- Experience coding with Python, including familiarity with object-oriented programming.
- Prior experience managing engineering labs or technical teams, including clean lab organization, equipment sharing, test priorities, and supplies management.
Nice to have
- Experience with Satellite Communications, Line-of-Sight Communications, or Radar applications.
This role has been open 64 days — well above the 22-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
517
|
Median days open
22 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (517 roles · 72 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 517 |
| Open roles in the wider Silicon Validation & Test family | 29 | 2203 · 110 employers |
| Median days open | 37 d | 22 d (+15 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Teradyne · 66 open roles · median 19 d
- Infineon Technologies · 38 open roles · median 37 d
- Renesas Electronics · 36 open roles · median 33 d
- Micron Technology · 28 open roles · median 28 d
- AMD · 25 open roles · median 34 d
- Qualcomm · 25 open roles · median 21 d
How we counted: 517 open Silicon Test Engineering (DFT Test) roles from 72 employers tracked in the SemiconductorJobs index, counted 7 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.