Originally posted 6 October 2026 by the employer.
This role focuses on Design-for-Test (DfT) and Built-in Self-Test (BiST) technologies for analog, mixed signal, and digital circuits.
About the role
This role involves driving Design-for-Test (DfT) and Built-in Self-Test (BiST) technologies and solutions for analog, mixed signal, and digital circuits for current and new IPs, targeting Automotive and Industrial markets.
What you'll do
- Define Design-for-Test (DfT) and Built-In-Self-Test (BIST) techniques for complex analog and digital designs.
- Develop and implement DFT methodologies and strategies for mixed-signal designs.
- Collaborate with cross-functional teams to ensure proper integration of DFT features.
- Define and outline ATE resource allocation, test plan, and project test times for product DFT/Design Reviews.
- Drive for test solutions with maximal DfT and minimal test complexity.
- Architect hierarchical DFT solutions covering multiple clock and power domains.
What you'll need
- 5+ years of direct experience with Analog / NVM / High Speed IO Digital Test & DFT Design.
- Experience working with ATE platforms.
- Programming skills using C/C++, Perl, Python.
- Statistical data analysis skills including correlation and application to test optimization.
- Extensive knowledge and hands-on experience with DFT methodologies, including scan, MBIST, JTAG, analog BIST, ATPG, functional test, and test compression.
- Experience in implementation of MBIST for memories and knowledge of repair schemes, algorithms.
This role has been open 1 day — well below the 55-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
244
|
Median days open
55 d
|
Median salary
$199k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (244 roles · 52 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 244 |
| Open roles in the wider Digital Design & Verification family | 57 | 3184 · 113 employers |
| Median days open | 149 d | 55 d (+94 d vs this employer) |
| Median salary (USD postings) | — | $199k |
Who's hiring in this category
- AMD · 39 open roles · median 37 d
- Qualcomm · 28 open roles · median 94 d
- NVIDIA · 22 open roles · median 50 d
- NXP Semiconductors · 18 open roles · median 90 d
- Synopsys · 12 open roles · median 22 d
- Micron Technology · 11 open roles · median 62 d
How we counted: 244 open DFT Engineering (DFT Test) roles from 52 employers tracked in the SemiconductorJobs index, counted 8 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.