Principal Signal/Power Integrity Engineer
Analog & Mixed-Signal Design
About the role
This Principal Signal/Power Integrity Engineer will lead Signal Integrity and Power Integrity simulations for AECG characterization and demo board designs. This role focuses on developing design trade-offs and directions within Power Integrity teams.
What you'll do
- Conduct Signal Integrity and Power Integrity simulations at feasibility, pre-layout, and post-layout phases.
- Establish design and layout guidelines for SI/PI.
- Coordinate with hardware design, layout, NPI, and manufacturing teams to resolve SI/PI issues.
- Perform end-to-end channel simulations for multi-gigabit serial lines such as 56Gbps and 112Gbps.
- Analyze Power Integrity for HBM, DDR4, LPDDR4, DDR5, LPDDR5, and other memory buses.
- Characterize product interfaces and verify simulations against measurements.
- Implement checklists for PCB development stages.
- Collaborate with architecture, package design, and PCB design teams for future PCB technology.
- Automate and update SIPI design and analysis flows.
What you'll need
- MS or PhD in Electrical Engineering.
- Expertise in Power Integrity and Signal Integrity.
- Experience with Signal Integrity and Power Integrity simulations for AECG characterization board and demo board design.
- Experience with end-to-end channel simulations for multi-gigabit serial lines.
- Experience with PI analysis simulations of HBM, DDR4, LPDDR4, DDR5, LPDDR5, and other memory buses.
- Experience characterizing interfaces in products and verifying simulations against measurements.
- Experience preparing and implementing checklists for PCB development.
- Experience working with architecture, package design, and PCB design teams for future PCB technology.
- Experience updating SIPI design and analysis flow and automating the process.
Nice to have
- Experience with PCB, Package, and IC level power delivery networks.
- Experience in silicon packaging and PCB design for signal and power integrity.
- Experience with high-speed digital signaling interfaces such as PCIE, GDDR6, HDMI.
- Expertise in electrical modeling EDA and AMS tools such as ADS, HFSS, SIwave, HSPICE.
- Expertise in electromagnetic theory and circuit analysis.
- Experience with programming in Python, C++, Matlab.
Skills: signal integrity (SI), power integrity (PI), multi-gigabit serial lines, HBM/DDR5, PCB design, packaging
Market context
This role has been open 139 days — well above the 89-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
215
|
Median days open
89 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | Market (215 open roles · 44 companies) |
|---|---|---|
| Open roles in category | 24 | 215 |
| Median days open | 60 d | 89 d (−29 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: signal integrity (SI), power integrity (PI), multi-gigabit serial lines, HBM/DDR5, PCB design, packaging
Who's hiring in this category
- AMD (this employer) · 24 open roles · median 60 d
- Cadence Design Systems · 19 open roles · median 152 d
- Qualcomm · 18 open roles · median 68 d
- Synopsys · 16 open roles · median 52 d
- Broadcom · 11 open roles · median 141 d
- Micron Technology · 9 open roles · median 126 d
Based on 215 open roles at 44 companies in our index. Snapshot 9 Sept 2026.