Principal SerDes Systems Engineer
Synopsys
img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Eindhoven, Netherlands
7 months ago
Analog & Mixed-Signal Design
This role focuses on SerDes system models for NRZ and PAM4 transceivers.
About the role
This role involves developing and maintaining SerDes system models and advanced algorithms for high-speed serial-link transceiver development, targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
What you'll do
- Develop and maintain SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
- Run comprehensive system simulations to verify design performance across multiple protocols and channels.
- Design and propose advanced algorithms to calibrate and adapt transceivers for optimal performance.
- Correlate simulated performance with silicon measurements.
- Provide expert assistance to customers for system-level performance issues and troubleshooting.
- Contribute to lab testing and analysis for high-speed serial links.
What you'll need
- M.Sc. or Ph.D. in Electrical or Computer Engineering.
- Strong experience modeling circuits and systems in MATLAB/Simulink.
- Expertise in designing high-speed analog CMOS circuits.
- Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.
- Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.
- Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
- Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
- Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/SystemVerilog.
Skills: SerDes system models, PAM4 transceivers, PCIe, Ethernet, DSP, high-speed serial links
Market context
This role has been open 118 days — well above the 89-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
215
|
Median days open
89 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | Market (215 open roles · 44 companies) |
|---|---|---|
| Open roles in category | 16 | 215 |
| Median days open | 52 d | 89 d (−37 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: SerDes system models, PAM4 transceivers, PCIe, Ethernet, DSP, high-speed serial links
Who's hiring in this category
- AMD · 24 open roles · median 60 d
- Cadence Design Systems · 19 open roles · median 152 d
- Qualcomm · 18 open roles · median 68 d
- Synopsys (this employer) · 16 open roles · median 52 d
- Broadcom · 11 open roles · median 141 d
- Micron Technology · 9 open roles · median 126 d
Based on 215 open roles at 44 companies in our index. Snapshot 9 Sept 2026.
Synopsys
img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Eindhoven, Netherlands
On-site
7 months ago