$122,900 - $255,200 USD yearly
Leading research and process development in wafer-level interconnects (BEOL), wafer-level packaging (WLP), and heterogeneous integration.
About the role
Skyworks is seeking a Principal R&D Engineer to serve as a principal investigator and individual contributor leading the development of wafer-level interconnects (BEOL), wafer-level packaging (WLP) approaches, and heterogeneous integration technologies. The role involves guiding R&D development, proposal capture, and process execution for integrated circuit and packaging solutions.
What you'll do
- Serve as a technical contributor and leader driving wafer-level interconnect, BEOL, WLP, and heterogeneous integration research.
- Author technology roadmaps aligned to long-term product and innovation strategies.
- Lead proposal development, technical shaping, capture, and execution of funded programs as Principal Investigator.
- Drive hands-on process ideation, development, pathfinding, troubleshooting, and execution for wafer and wafer-level packaging technologies.
- Direct technicians, junior engineers, and process engineers to execute development activities in cleanroom environments.
- Generate intellectual property, including patents, invention disclosures, and proprietary process know-how.
What you'll need
- Ph.D. in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, or a related technical field.
- 8+ years of hands-on semiconductor R&D experience in cleanroom fabrication environments.
- Demonstrated expertise in semiconductor BEOL processing and/or wafer-level packaging (WLP) technologies.
- Hands-on experience with advanced metallization, dielectric integration, and interconnect process development.
- Proven ability to lead and guide small, multidisciplinary R&D teams.
- Written and verbal communication skills covering proposal development, technical reporting, and executive presentations.
Nice to have
- 3+ years of experience serving as a Principal Investigator or technical lead for advanced R&D programs, including sponsorship by U.S. Government agencies such as DARPA or AFRL.
- GaN RF transistor fabrication experience and working knowledge of mask layout design for analog and RF applications.
- Experience with 3D heterogeneous integration (3DHI), wafer-to-wafer and die-to-wafer bonding, Cu-Cu hybrid bonding, wafer thinning, lap/grind, and TSV technologies.
- Hands-on experience with lithography (stepper or e-beam), etch, metallization, CMP, and SEM/FIB analysis.
- Experience with DC/RF characterization (S-parameters, load-pull), epitaxial design collaboration, or data analytics tools like Spotfire.
Skills: BEOL, Wafer-level packaging, Heterogeneous integration, WLP, Hybrid bonding, TSV
More semiconductor jobs: Advanced packaging jobs
This role has been open 12 days — well below the 57-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
77
|
Median days open
57 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Skyworks | All employers we track in this specialty (77 roles · 27 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 77 |
| Median days open | 10 d | 57 d (−47 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Skills observed across this category: BEOL, Wafer-level packaging, Heterogeneous integration, WLP, Hybrid bonding, TSV
Who's hiring in this category
- AMD · 14 open roles · median 28 d
- Micron Technology · 9 open roles · median 191 d
- Marvell Technology · 6 open roles · median 36 d
- NVIDIA · 6 open roles · median 61 d
- Qualcomm · 5 open roles · median 81 d
- Broadcom · 3 open roles · median 99 d
How we counted: 77 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 27 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.