$143,800 - $230,000 USD yearly
Originally posted 31 October 2026 by the employer.
About the role
As a Principal Physical Design Engineer specializing in Static Timing Analysis (STA) within the ASIC Products Division (APD), you will ensure high-performance ASICs meet timing requirements across operating conditions. The team focuses on full-chip physical implementation and timing closure for custom ASICs across advanced foundry nodes including N7, N5, N3, and N2.
What you'll do
- Own full-chip timing sign-off and final timing closure across PVT corners, authoring and maintaining SDC for functional and test modes.
- Deploy AI/ML automation within STA flows to minimize execution runtime, improve infrastructure efficiency, and implement ML-based corner reduction while maintaining physical coverage.
- Triage violations and isolate root causes using automated workflows and data mining to eliminate timing and design marginalities across clock networks and multi-die boundaries.
- Leverage advanced OCV, SI, and IR-drop concepts to drive timing ECOs and collaborate with RTL, Physical Design, and DFT teams to optimize PPA.
What you'll need
- Bachelor’s degree in Electrical or Computer Engineering.
- 12+ years of hands-on ASIC STA and timing closure experience.
- Expert proficiency in sign-off tools such as PrimeTime or Tempus.
- Expertise in advanced multi-mode multi-corner (MMMC) scenarios and on-chip variation (OCV) management.
- Strong scripting skills in Tcl, Python, Perl, and Shell.
- Experience utilizing AI plugins and data-mining scripts for runtime reduction and reporting.
Skills: STA, PrimeTime, timing closure, MMMC, constraints, SDC
More semiconductor jobs: Broadcom jobs · Physical design jobs
This role has been open 0 days — well below the 59-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
693
|
Median days open
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (693 roles · 84 employers) |
|---|---|---|
| Open roles in this specialty | 45 | 693 |
| Open roles in the wider Physical Implementation family | 52 | 1537 · 112 employers |
| Median days open | 67 d | 59 d (+8 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: STA, PrimeTime, timing closure, MMMC, constraints, SDC
Who's hiring in this category
- Qualcomm · 111 open roles · median 52 d
- AMD · 63 open roles · median 33 d
- Synopsys · 40 open roles · median 45 d
- Broadcom (this employer) · 38 open roles · median 100 d
- NVIDIA · 37 open roles · median 70 d
- Intel Corporation · 36 open roles · median 22 d
How we counted: 693 open Physical Design (Physical Design) roles from 84 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.