$122,900 - $255,200 USD yearly
About the role
This role serves as a Principal Investigator and key individual contributor, providing technical leadership in RF-based 3D heterogeneous integration (3DHI). The position is responsible for identifying, developing, and maturing RF system-in-package (SiP), wafer-level packaging (WLP), and heterogeneous integration technologies for radar, communications, and emerging applications.
What you'll do
- Lead research and technology development in advanced microelectronics packaging, including 3D heterogeneous integration (3DHI), wafer-level packaging (WLP), and advanced RF packaging technologies.
- Develop concepts, architectures, and integration approaches for RF systems, subsystems, and system-in-package (SiP) solutions.
- Evaluate emerging materials, assembly processes, packaging architectures, and manufacturing technologies to enhance RF performance, miniaturization, reliability, and cost.
- Develop RF-enabled heterogeneous integration solutions incorporating semiconductor devices, advanced substrates, embedded passives, antennas, and interconnect technologies.
- Lead modeling, simulation, characterization, and validation activities across device, package, and subsystem levels.
- Identify and pursue externally funded research opportunities with government agencies, industry consortia, universities, and national laboratories, serving as Principal Investigator or technical lead.
What you'll need
- Ph.D. in Electrical Engineering, Materials Science, Physics, Mechanical Engineering, or a related technical discipline.
- 8+ years of industrial, government laboratory, or academic research experience in advanced microelectronics packaging, heterogeneous integration, or closely related fields.
- Expertise in advanced package assembly, interconnect technologies, and subsystem integration.
- Track record of leading research programs from concept development through technology demonstration, transition, or commercialization.
- Understanding of advanced packaging technologies, including multi-chip modules (MCM), system-in-package (SiP), wafer-level packaging (WLP), chiplet architectures, and 2.5D/3D integration.
- Record of technical innovation through patents, peer-reviewed publications, or conference presentations.
Nice to have
- Experience with RF packaging solutions for microwave, mmWave, and sub-THz applications, including phased-array, radar, satellite communications, aerospace and defense, and wireless infrastructure systems.
- Knowledge of laminate-based packaging, organic and inorganic substrates, and package-on-package architectures.
Skills: 3DHI, heterogeneous integration, SiP, wafer-level packaging, RF, chiplet
More semiconductor jobs: Advanced packaging jobs
This role has been open 8 days — well below the 57-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
77
|
Median days open
57 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Skyworks | All employers we track in this specialty (77 roles · 27 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 77 |
| Median days open | 10 d | 57 d (−47 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Skills observed across this category: 3DHI, heterogeneous integration, SiP, wafer-level packaging, RF, chiplet
Who's hiring in this category
- AMD · 14 open roles · median 28 d
- Micron Technology · 9 open roles · median 191 d
- Marvell Technology · 6 open roles · median 36 d
- NVIDIA · 6 open roles · median 61 d
- Qualcomm · 5 open roles · median 81 d
- Broadcom · 3 open roles · median 99 d
How we counted: 77 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 27 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.