Principal, MTS, DRAM Systems Architect - Boise, ID - Main Site, United States

Originally posted 22 July 2026 by the employer — open 50 days.

About the role

This role involves developing critical high-speed IP circuits for Micron’s DRAM memory products, focusing on equalization and bandwidth extension.

What you'll do

• Innovate, design, optimize, and verify high-speed IO and clocking circuits used in new DRAM products.
• Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level.
• Develop accurate modeling, analysis, and simulation methodology to capture key circuit performance metrics and their impact on product specifications at full-chip and system level.
• Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities.
• Collaborate with process integration and transistor modeling teams on Micron's process node.
• Work with the internal data science team and EDA vendors to leverage and improve AI-assisted design flow and circuits optimization.

What you'll need

• MSEE + 10 years or BSEE + 12 years of industry experience with strong background in designing high-speed IO interface, timing, and clocking circuits with proven silicon successes.
• Ability to supervise layout work and understand good layout practices for high-speed circuits to minimize parasitic impacts.
• Strong interpersonal skills with the ability to convey sophisticated technical concepts to other design peers both verbally and in writing.
• Mental agility and ability to multi-task.

Nice to have

• Prior experience in DRAM circuit design.
• Prior experience in channel modeling and characterization, transceiver noise and timing budget analysis, equalization techniques, and SI knowledge.
• Understanding of device physics and basic CMOS processing techniques.
• Demonstrated ability in mentoring and coaching engineers early in their careers.
• Demonstrated ability with AI/ML usage and fluency in scripting languages such as PERL/Python.

Skills: high-speed IO, clocking circuits, timing and jitter, DRAM products, channel modeling