Principal Engineer, Physical Design - Austin, TX, United States
$156,400 - $231,440 USD yearly
Originally posted 28 August 2026 by the employer.
About the role
This role involves physical design and methodology for high-performance processor chips. You will lead the development of advanced physical design methodologies and automation flows.
What you'll do
- Architect and lead the development of physical design methodologies and automation flows.
- Provide technical leadership in RTL-to-GDSII implementation, including synthesis, floorplanning, place and route, clock tree synthesis, and timing closure.
- Serve as a technical advisor across multiple projects, influencing design decisions and resolving implementation challenges.
- Collaborate with global cross-functional teams, including RTL, verification, and CAD, to ensure cohesive and optimized design execution.
- Mentor and coach senior and junior engineers, fostering technical growth and promoting best practices.
- Evaluate and drive adoption of emerging EDA tools and technologies.
What you'll need
- Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of progressive experience in back-end physical design and verification, including leadership roles.
- Deep understanding of RTL to GDSII flows, including synthesis, place and route, clock tree synthesis, and timing closure.
- Strong expertise in static timing analysis (e.g., PrimeTime, Tempus) and power/signal integrity tools (e.g., Voltus, RedHawk).
- Proficient in scripting languages such as Python, Perl, Tcl, and Makefile for automation and flow development.
- Demonstrated experience in developing and deploying physical design methodologies and flows.
- Strong communication and collaboration skills.
Nice to have
- Experience working with EDA vendors and evaluating new tools and technologies.
Skills: RTL-to-GDSII, synthesis, floorplanning, place and route, timing closure, physical design methodologies
This role has been open 30 days — well below the 63-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
624
|
Median days open
63 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (624 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 624 |
| Open roles in the wider Physical Implementation family | 15 | 1399 · 108 employers |
| Median days open | 30 d | 63 d (−33 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: RTL-to-GDSII, synthesis, floorplanning, place and route, timing closure, physical design methodologies
Who's hiring in this category
- Qualcomm · 113 open roles · median 39 d
- AMD · 41 open roles · median 27 d
- NVIDIA · 38 open roles · median 52 d
- Broadcom · 37 open roles · median 77 d
- Synopsys · 27 open roles · median 66 d
- NXP Semiconductors · 26 open roles · median 76 d
How we counted: 624 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 28 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.