Principal Engineer - AI Systems & Performance Lab
$202,200 - $343,700 USD yearly
Originally posted 28 October 2026 by the employer.
About the role
This Principal Engineer role establishes and leads an AI Systems & Performance Lab focused on identifying and eliminating AI bottlenecks across real-world workloads, software stacks, and diverse hardware configurations. You will define technical methodologies and deliver insights that directly influence system architecture, platform strategy, and future hardware designs.
What you'll do
- Establish the technical vision, charter, and research agenda for the AI Lab focused on AI workload characterization and performance bottleneck analysis.
- Drive end-to-end performance analysis of AI training and inference workloads spanning compute, memory hierarchy, interconnects, storage, power, and software layers.
- Develop repeatable root-cause analysis methodologies and profiling frameworks across heterogeneous platforms including CPUs, GPUs, NPUs, and custom accelerators.
- Architect and oversee benchmarking, profiling, and workload characterization frameworks to evaluate AI performance across diverse hardware configurations and system topologies.
- Partner with hardware, platform, and system architecture teams to translate workload insights into actionable silicon and system design recommendations.
- Provide technical mentorship to engineers and represent the AI Lab in technical reviews, architecture forums, and executive briefings.
What you'll need
- Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical field.
- 15+ years of industry experience in systems engineering, AI infrastructure, performance engineering, computer architecture, or hardware/software co-design.
- Deep hands-on experience with AI workloads (training and/or inference), including modern deep learning models and frameworks such as PyTorch, TensorFlow, or JAX.
- Strong understanding of end-to-end system performance across compute architectures, memory hierarchy, interconnects, storage, and software stacks.
- Proven ability to identify, analyze, and root-cause performance bottlenecks across heterogeneous systems (CPU, GPU, NPU, accelerators).
- Demonstrated technical leadership with director-level influence, driving strategy and architectural recommendations for executive stakeholders.
Nice to have
- Master’s or PhD in AI systems, computer architecture, performance modeling, or large-scale distributed systems.
- Hands-on experience with AI accelerators (GPUs, NPUs, custom silicon) and their software ecosystems.
- Background in benchmarking, profiling, and workload characterization, including custom tool or framework development.
- Familiarity with compiler stacks, runtimes, and low-level performance analysis tools.
- Track record of technical thought leadership, including patents, publications, standards contributions, or widely adopted internal frameworks.
Skills: AI Workloads, Workload Characterization, Benchmarking, Accelerators, System Architecture, Performance Modeling
More semiconductor jobs: SanDisk jobs · SoC design jobs · California jobs
This role has been open 0 days — well below the 204-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · AI ML Hardware
|
Open roles in category
31
|
Median days open
204 d
|
Category median salary (all employers)
$246k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SanDisk | All employers we track in this specialty (31 roles · 12 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 31 |
| Open roles in the wider Digital Design & Verification family | 16 | 3321 · 115 employers |
| Median days open | 0 d | 204 d (−204 d vs this employer) |
| Median salary (USD postings) | — | $246k |
Skills observed across this category: AI Workloads, Workload Characterization, Benchmarking, Accelerators, System Architecture, Performance Modeling
Who's hiring in this category
- Qualcomm · 8 open roles · median 204 d
- NVIDIA · 7 open roles · median 200 d
- AMD · 3 open roles · median 182 d
- SiFive · 3 open roles · median 201 d
- Infineon Technologies · 2 open roles · median 198 d
- Intel Corporation · 2 open roles · median 6 d
How we counted: 31 open SoC/Chip Architecture (AI ML Hardware) roles from 12 employers tracked in the SemiconductorJobs index, counted 30 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.