Principal Design Engineer - Torrance, CA 90503
About the role
This role involves leading the architecture, design, and silicon execution of power management ICs from concept through production.
What you'll do
- Lead the architecture, design, and verification of power management ICs from transistor-level blocks to full top-level integration.
- Drive IC architecture decisions for products including AC-DC, DC-DC, ACF, LLC, QR, and related power topologies.
- Interface closely with device, modeling, and EDA teams to optimize device selection, models, and simulation methodologies.
- Guide and review physical layout and floor planning.
- Own tape-out execution, ensuring designs meet performance, schedule, and quality requirements.
- Lead silicon bring-up, lab validation, debugging, and correlation versus simulation.
What you'll need
- Proven experience as chip lead or technical owner on at least one successful silicon program.
- Demonstrated track record of delivering power ICs from concept to high-volume production, including architecture definition, circuit design, layout supervision, post-extraction verification, lab characterization and debug, and yield and failure analysis support.
- Strong experience in AC-DC and/or DC-DC power IC design.
- Deep expertise in analog and mixed-signal building blocks such as Bandgap references, LDOs, Comparators, Charge pumps, and Operational amplifiers.
- Degree in Electrical Engineering, Material Science, Applied Physics or related Fields.
- Strong understanding of semiconductor device physics, SOA, and power transistors used in high-frequency switching.
- Solid knowledge of silicon fabrication processes and their impact on device models and circuit performance.
Nice to have
- MSEE + 7+ years or PhD + 5+ years of industry experience in analog or mixed-signal IC design.
- Proficiency with EDA tools, including Cadence Virtuoso / Spectre, Post-parasitic extraction simulation, Monte Carlo and corner analysis.
- Experience with DFT methodologies, characterization strategies, and production test planning.
- Hands-on lab experience with silicon validation, debug, and characterization.
Skills: power management ICs, AC-DC, DC-DC, analog and mixed-signal building blocks, tape-out execution
This role has been open 0 days — well below the 78-day median for Analog IC Design roles.
Analog IC Design · Power Management
|
Open roles in category
89
|
Median days open
78 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Navitas Semiconductor | All employers we track in this specialty (89 roles · 16 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 89 |
| Open roles in the wider Analog & Mixed-Signal family | 5 | 1321 · 103 employers |
| Median days open | 0 d | 78 d (−78 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: power management ICs, AC-DC, DC-DC, analog and mixed-signal building blocks, tape-out execution
Who's hiring in this category
- Renesas Electronics · 23 open roles · median 82 d
- onsemi · 16 open roles · median 77 d
- Monolithic Power Systems · 9 open roles · median 180 d
- QORVO · 8 open roles · median 31 d
- Infineon Technologies · 7 open roles · median 75 d
- Analog Devices · 6 open roles · median 111 d
How we counted: 89 open Analog IC Design (Power Management) roles from 16 employers tracked in the SemiconductorJobs index, counted 16 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.