Principal Design Engineer - CORK 01, Ireland

Originally posted 22 October 2025 by the employer — open 323 days.

About the role

You will work on blocks such as IOs, amplifiers, comparators, drivers, duty cycle correctors, PLLs, DLLs, and level shifters in advanced IC nodes like 5nm FinFET CMOS.

What you'll do

• Lead Analog and Mixed Signal design of high speed memory interface analog components.
• Provide technical direction and coordination to the analog IC design team.
• Design and develop analog/mixed signal IC circuit blocks from initial concept through final verification.
• Work closely with Physical Design Engineers to design IC circuit blocks and PMA sections.
• Identify opportunities to advance technology of analog design and participate in strategic internal analog IP development.
• Mentor Junior Design Engineers when needed.

What you'll need

• Minimum of 4 years of CMOS design experience.
• Good understanding of jitter and signal equalization techniques.
• Design experience in SERDES circuit blocks such as Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators.
• Proficiency in using CAD tools for circuit simulation, layout, and physical verification.
• Ability to work cooperatively in a team environment.

Nice to have

• Cadence tool experience.
• Design experience in <40nm technologies.
• Lab test experience as part of silicon evaluation.

Skills: analog/mixed-signal IC circuit blocks, DDR memory interface PHYs, high-speed I/O IC design, SERDES circuit blocks, CMOS design