Principal Analog Mixed-Signal Engineer - Rijswijk, Zuid-Holland, Netherlands
Originally posted 29 December 2025 by the employer — open 254 days.
About the role
The Principal Analog Mixed-Signal Engineer will ensure first-pass success on Analog CMOS circuit solutions, leveraging SiTime's MEMS technology.
What you'll do
- Develop precision timing circuit architectures, design innovative circuits with aggressive technical performance specifications, performing transistor-level design and simulations.
- Plan and execute circuit designs that address demanding frequency stability, phase noise, power consumption, and silicon die area specifications.
- Perform technology, architecture, circuit design, and parametric design trade-offs to accomplish spec-compliant designs.
- Supervise and guide Senior Analog Circuit Designers, and supervise Analog Circuit Physical Design Layout.
- Perform post-layout parasitic-extraction and back-annotated simulations to validate design across Process, Voltage, Temperature.
- Initiate Design-of Experiments for Root Cause Analysis, investigate anomalous observations in silicon across PVT conditions, and propose solutions.
What you'll need
- MS Degree in Electrical Engineering.
- Minimum 10 years of high-performance analog circuit design experience.
- Proven track record in Circuit Architecture development and technical feasibility studies, Design partitioning for phase noise / power budgeting, Writing detailed block-level specifications, and Detailed design, test bench development, and simulation of basic analog building blocks.
- Expert-level experiential knowledge of architecting and implementing ultra low-jitter, power-efficient Frac-N PLLs.
- Experiential knowledge of ultra-low phase-noise design, power supply noise considerations, device matching, parasitic extraction, and signal integrity.
- Chip-level design and verification of complex mixed-signal chips.
Nice to have
- PhD in Electrical Engineering.
- 3 years of prior lead/supervisory/managerial experience.
Skills: Analog Mixed-Signal Engineer, precision timing circuit architectures, ultra low-jitter, power-efficient Frac-N PLLs, Analog CMOS circuit solutions, post-layout parasitic-extraction
This role has been open 169 days — well above the 79-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
173
|
Median days open
79 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SiTime | All employers we track in this specialty (173 roles · 44 employers) |
|---|---|---|
| Open roles in category | 11 | 173 |
| Median days open | 169 d | 79 d (+90 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: Analog Mixed-Signal Engineer, precision timing circuit architectures, ultra low-jitter, power-efficient Frac-N PLLs, Analog CMOS circuit solutions, post-layout parasitic-extraction
Who's hiring in this category
- Analog Devices · 25 open roles · median 117 d
- Infineon Technologies · 14 open roles · median 71 d
- NVIDIA · 12 open roles · median 51 d
- SiTime (this employer) · 11 open roles · median 169 d
- Qualcomm · 10 open roles · median 55 d
- Microchip Technology · 8 open roles · median 168 d
How we counted: 173 open Mixed-Signal Design (Mixed Signal) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.