Principal Analog IC Design Engineer, High Speed SerDes
Analog & Mixed-Signal Design
£136,500 - £253,500 GBP yearly
About the role
This Principal Analog IC Designer role involves the design and development of analog/mixed-signal IC circuit blocks from initial concept through final verification of conformance to specifications.
What you'll do
- Design and develop analog/mixed-signal IC circuit blocks.
- Perform final verification of conformance to customer specifications.
- Utilize CAD tools for circuit simulation, layout, and physical verification.
What you'll need
- Minimum 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
- Thorough understanding of jitter and signal equalization techniques.
- Proficient design experience in Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, ADC and DAC, Bias and Bandgap, and Voltage Regulators.
- Proficiency in using CAD tools for circuit simulation, layout, and physical verification.
- MS or PhD in EE.
Nice to have
- Working knowledge of common SerDes standards and their electrical requirements.
- Cadence tool experience.
- Lab test experience.
- Design experience at >10Gbps.
- Design experience in <28nm technologies.
Skills: SerDes, jitter, equalization, PLL, high speed clock distribution, CMOS
Market context
This role has been open 168 days — well above the 89-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
215
|
Median days open
89 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | Market (215 open roles · 44 companies) |
|---|---|---|
| Open roles in category | 19 | 215 |
| Median days open | 152 d | 89 d (+63 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: SerDes, jitter, equalization, PLL, high speed clock distribution, CMOS
Who's hiring in this category
- AMD · 24 open roles · median 60 d
- Cadence Design Systems (this employer) · 19 open roles · median 152 d
- Qualcomm · 18 open roles · median 68 d
- Synopsys · 16 open roles · median 52 d
- Broadcom · 11 open roles · median 141 d
- Micron Technology · 9 open roles · median 126 d
Based on 215 open roles at 44 companies in our index. Snapshot 9 Sept 2026.
SAN JOSE, United States
On-site
£136,500 - £253,500 GBP yearly
2 months ago