Originally posted 24 September 2026 by the employer.
About the role
This role involves leading and designing analog IP blocks for power management products. You will be responsible for the technical outcomes of design, verification, implementation, and execution of power management ICs.
What you'll do
- Lead and design analog IP blocks from definition to IP delivery.
- Evaluate intermediate project results during design and silicon evaluation.
- Provide guidance to layout engineers for IP blocks and monitor progress.
- Collaborate with validation, product engineering, and test engineering teams for production transfer.
- Own technical outcomes of design, verification, implementation, and execution of power management ICs.
- Understand project goals, execute to schedule, and monitor progress.
What you'll need
- BS in Electrical Engineering or related with 12 years of experience, or MS with 10 years of experience.
- Solid track record of designing multiple complex IPs with Si learnings.
- Experience with IP design, simulations methods, boundary conditions, stress and reliability simulations, PVT/PMC/SOA simulations.
- Extensive knowledge of engineering processes, principles, and methodologies.
- Strong CMOS circuit design fundamentals and circuit architectures.
- Understanding of charge pump, LDOs, gate drivers, comparators, linear regulators, gm-stage, and relevant Analog building blocks.
- Strong Analog IC design skills and debug of complex silicon problems using simulations and/or bench testing.
- Familiarity with advanced Bipolar, CMOS, and High Voltage BCD technology, Process, Device Physics, Semiconductor Manufacturing processes, and their impact on Analog performance.
- Understanding of power transistor Design, Layout, and Robustness.
- Proficiency in Simplis or MATLAB for architectural simulations, and Cadence Spectre for schematic capture, simulation, layout, and tape-out.
Skills: analog IP blocks, power management ICs, CMOS circuit design, LDOs, Cadence Spectre
This role has been open 0 days — well below the 78-day median for Analog IC Design roles.
Analog IC Design · Power Management
|
Open roles in category
84
|
Median days open
78 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (84 roles · 15 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 84 |
| Open roles in the wider Analog & Mixed-Signal family | 45 | 1345 · 106 employers |
| Median days open | 35 d | 78 d (−43 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: analog IP blocks, power management ICs, CMOS circuit design, LDOs, Cadence Spectre
Who's hiring in this category
- Renesas Electronics · 20 open roles · median 85 d
- onsemi (this employer) · 16 open roles · median 85 d
- Monolithic Power Systems · 9 open roles · median 188 d
- Infineon Technologies · 7 open roles · median 83 d
- QORVO · 7 open roles · median 24 d
- Analog Devices · 6 open roles · median 119 d
How we counted: 84 open Analog IC Design (Power Management) roles from 15 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.