Pre-Silicon Power Management Engineer - TX, Austin, United States
Originally posted 27 October 2026 by the employer.
About the role
This role drives pre-silicon emulation debug, development, and validation of complex boot flows, connections, and peripherals in SOC designs.
What you'll do
- Work with pre-silicon tools and concepts such as emulation, FPGA, software models, and N-1 silicon usage, including pre-to-post-silicon initiatives. - Validate silicon designs and implement Shift Left initiative technologies to enhance system validation quality and coverage prior to silicon arrival. - Contribute to high-priority issue debug and execution on critical projects. - Plan and implement shift left work for upcoming products in coordination with the product Lead System Engineer and product Silicon Evaluation Lead. - Define shift left strategies for new products and define key metrics to track improvements. - Collaborate with other business units within AMD to share learnings and best practices.
What you'll need
- Bachelor, Master's or PhD degree in Electrical, Computer, or Software Engineering, or related degree. - In-depth understanding of microprocessor product development. - Experience solving multiple concurrent complex problems on aggressive timelines.
Nice to have
- Focused experience in emulation and other shift left technologies and processes. - Hands-on experience validating low-power states such as S0i3 in pre-silicon emulation environments, including debug of entry/exit flows and dependencies across firmware and hardware components. - Knowledge of computer system architecture and microprocessor development. - Demonstrated success in product verification, emulation, and post silicon validation. - Knowledge of Verilog, C, C++, assembly, TCL/TK, Python, and/or other scripting languages.
Skills: emulation, pre-silicon, power management, S0i3, shift left, Verilog
This role has been open 0 days — well below the 67-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1268
|
Median days open
67 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1268 roles · 96 employers) |
|---|---|---|
| Open roles in this specialty | 92 | 1268 |
| Open roles in the wider Digital Design & Verification family | 259 | 3359 · 116 employers |
| Median days open | 56 d | 67 d (−11 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: emulation, pre-silicon, power management, S0i3, shift left, Verilog
Who's hiring in this category
- Qualcomm · 120 open roles · median 46 d
- NVIDIA · 93 open roles · median 66 d
- AMD (this employer) · 92 open roles · median 56 d
- Synopsys · 67 open roles · median 42 d
- SiFive · 56 open roles · median 80 d
- Cadence Design Systems · 50 open roles · median 132 d
How we counted: 1268 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.