Physical Design Intern - Singapore
Originally posted 22 September 2026 by the employer — open 0 days.
About the role
This Physical Design Intern position involves contributing to the design and tape-out of ultra low power chips in advanced process nodes within the SoC team.
What you'll do
- Support block-level physical implementation for SoC designs.
- Assist with floorplanning, placement, clock tree synthesis (CTS), routing, and timing closure.
- Run and analyze static timing analysis (STA) and help debug timing violations (setup/hold).
- Help perform power, signal integrity, and IR drop analysis under guidance.
- Contribute to design rule check (DRC) and layout versus schematic (LVS) closure activities.
- Develop and maintain scripts (e.g., Tcl, Python, Shell) to automate recurring tasks.
What you'll need
- Currently pursuing a B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
- Completed coursework in Digital logic design, VLSI design / physical design / ASIC design, or CMOS circuits.
- Familiarity with Verilog or VHDL and digital design concepts (timing, pipelining, clocking).
- Basic understanding of physical design concepts such as placement, routing, timing closure, clock trees, and power grid planning.
- Comfortable working in a Linux/UNIX environment.
Nice to have
- Completed coursework in Computer architecture.
Skills: block-level physical implementation, floorplanning, placement, clock tree synthesis, timing closure
This role has been open 0 days — well below the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
606
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Ambiq Micro | All employers we track in this specialty (606 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 606 |
| Open roles in the wider Physical Implementation family | 1 | 1407 · 108 employers |
| Median days open | 0 d | 61 d (−61 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: block-level physical implementation, floorplanning, placement, clock tree synthesis, timing closure
Who's hiring in this category
- Qualcomm · 111 open roles · median 43 d
- Broadcom · 38 open roles · median 71 d
- NVIDIA · 38 open roles · median 46 d
- AMD · 35 open roles · median 41 d
- Synopsys · 27 open roles · median 60 d
- Renesas Electronics · 25 open roles · median 48 d
How we counted: 606 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.