Physical Design Engineer - Bengaluru, India
Originally posted 5 January 2026 by the employer.
About the role
As a Physical Design Engineer on the ASIC R&D team, you will drive physical design flow execution from RTL to GDSII to optimize PPA for Syntiant ASICs.
What you'll do
- Drive RTL to GDSII physical design implementation, including synthesis, pad ring, floorplan, placement, clock tree synthesis, detailed routing, and optimization. - Execute physical signoff verification and collaborate with the physical verification team to clean up layout violations. - Build chip floorplans, including partitions and power grid structures. - Implement signoff ECO flows to fix timing, noise, IR-drop, and EMIR violations. - Debug and resolve LVS, DRC, and PERC issues at the chip and block level using industry-standard tools. - Interface with foundries to complete tape-out forms, jobview, and related verification checks.
What you'll need
- Advanced degree in electronics engineering with 5+ years of experience in physical design and implementation. - Experience with the complete RTL to GDSII flow and industry-standard EDA tools for physical design and timing signoff. - Working knowledge of physically aware synthesis, metal fill, chip finishing, signal integrity checks, static/dynamic EMIR-drop analysis, and formal ESD verification. - Experience with UPF low-power flows and package/RDL routing design. - Hands-on experience with programming and scripting languages such as Python, Perl, or TCL.
Nice to have
- Experience with scan insertion and ATPG pattern generation. - Experience with power analysis flows.
Skills: RTL to GDSII, Floorplan, Clock Tree Synthesis, Placement, Timing Signoff, PPA
This role has been open 124 days — well above the 66-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
682
|
Median days open
66 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Syntiant | All employers we track in this specialty (682 roles · 80 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 682 |
| Open roles in the wider Physical Implementation family | 2 | 1530 · 112 employers |
| Median days open | 124 d | 66 d (+58 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: RTL to GDSII, Floorplan, Clock Tree Synthesis, Placement, Timing Signoff, PPA
Who's hiring in this category
- Qualcomm · 126 open roles · median 49 d
- AMD · 61 open roles · median 29 d
- Intel Corporation · 40 open roles · median 19 d
- Synopsys · 38 open roles · median 41 d
- Broadcom · 37 open roles · median 102 d
- NVIDIA · 37 open roles · median 69 d
How we counted: 682 open Physical Design (Physical Design) roles from 80 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.