$140,000 - $190,000 USD yearly
Manage heterogeneous Silicon-III-V photonic wafer processing across external foundry partners.
About the role
As a Photonics Process Integration Engineer, you will technically manage OpenLight's heterogeneous Silicon-III-V photonic wafer process across external foundry partners. The scope spans silicon front end processing, heterogeneous wafer bonding, III-V post-bond processing, and backend wafer processing.
What you'll do
- Manage end-to-end fabrication lots, including creating detailed fabrication plans, participating in mask layout reviews for DfM, leading foundry process reviews, and tracking lot progress.
- Drive process development initiatives for silicon and silicon nitride devices with internal teams and external foundries to integrate functionalities on the heterogeneous Si Photonics platform.
- Evaluate in-line metrology data, generate statistical process control (SPC) charts, and analyze electrical and optical process control monitor (PCM) results for yield improvement.
- Oversee wafer bonding initiatives, identify yield-limiting factors, and formulate design of experiments (DOE) to improve manufacturing yields.
- Track process deviations, drive failure analysis with external labs and internal teams, and establish control plans and process specifications for high-volume manufacturing.
- Support development of new process modules for the OpenLight process design kit (PDK) and product roadmap.
What you'll need
- PhD in Electrical Engineering, Applied Material Science, Applied Physics, or related discipline, or an MS degree with 2-5 years of relevant professional experience.
- Hands-on experience in silicon photonic wafer process development and manufacturing, including photolithography, plasma etching techniques, planarization, and metallization.
- Process development and manufacturing experience with Si/SiN or III-V materials, with knowledge of heterogeneous or hybrid Si-III-V integration.
- Practical experience with semiconductor metrology techniques including ellipsometry, profilometry, SEM, TEM, and AFM.
- Hands-on experience with optical or electronic PCM, device data analysis, and IC wafer processing failure analysis techniques.
- Solid understanding of statistical processes and data analysis.
Skills: process integration, wafer bonding, SPC, DOE, failure analysis, III-V
More semiconductor jobs: Process engineer jobs · Santa Clara jobs
This role has been open 0 days — well below the 53-day median for Process Integration roles.
Process Integration · Process Integration
|
Open roles in category
248
|
Median days open
53 d
|
Category median salary (all employers)
$158k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | OpenLight | All employers we track in this specialty (248 roles · 39 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 248 |
| Open roles in the wider Process, Fab & Equipment family | 1 | 10088 · 116 employers |
| Median days open | 0 d | 53 d (−53 d vs this employer) |
| Median salary (USD postings) | — | $158k |
Skills observed across this category: process integration, wafer bonding, SPC, DOE, failure analysis, III-V
Who's hiring in this category
- Micron Technology · 84 open roles · median 66 d
- GlobalFoundries · 29 open roles · median 38 d
- Intel Corporation · 14 open roles · median 21 d
- SanDisk · 14 open roles · median 4 d
- Renesas Electronics · 9 open roles · median 96 d
- Infineon Technologies · 8 open roles · median 31 d
How we counted: 248 open Process Integration (Process Integration) roles from 39 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.