Packaging Engineer - Suzhou, China
Originally posted 7 September 2026 by the employer — open 15 days.
About the role
This role involves driving supplier engagement for external Wire Bond, Flip Chip Assembly, and Bumping manufacturers to achieve key performance indices.
What you'll do
- Drive supplier engagement for continuous improvement and new capabilities.
- Plan and drive New Product Introduction activities and Ramp Up readiness.
- Drive external manufacturers on issue resolution and prevention.
- Monitor performance of external manufacturing sites regarding yield, out of control lots, and outliers.
- Plan and execute change management from internal or external parties.
- Proactively drive continuous improvement in process simplification and quality enhancement.
What you'll need
- Strong knowledge in Flip Chip/WireBond Assembly process.
- Minimum 5 years of process development work leading to volume production in Semiconductor ASIC facility.
- Familiarity with tools (AI agents, JMP, minitab, failure analysis knowledges, package reliability knowledges).
- Familiarity with industry standards (ESD, Jedec, Automotive).
- Bachelor/MS degree in Mechanical or Material or Chemical Engineering.
Nice to have
- Bumping/RDL process experience.
Skills: wire bond, flip chip assembly, bumping, process development, yield
This role has been open 15 days — well below the 68-day median for Packaging Engineering roles.
Packaging Engineering · Packaging
|
Open roles in category
194
|
Median days open
68 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (194 roles · 41 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 194 |
| Open roles in the wider Process, Fab & Equipment family | 55 | 9417 · 108 employers |
| Median days open | 21 d | 68 d (−47 d vs this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: wire bond, flip chip assembly, bumping, process development, yield
Who's hiring in this category
- Infineon Technologies · 27 open roles · median 33 d
- Renesas Electronics · 20 open roles · median 25 d
- Micron Technology · 17 open roles · median 144 d
- Intel Corporation · 12 open roles · median 150 d
- Monolithic Power Systems · 12 open roles · median 186 d
- onsemi · 7 open roles · median 66 d
How we counted: 194 open Packaging Engineering (Packaging) roles from 41 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.