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SanDisk

Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate) - Taichung, Taiwan

SanDisk Taichung, Taiwan Full-time 24 days ago
Packaging & Advanced Integration

Originally posted 11 September 2026 by the employer — open 9 days.

About the role

This role involves the development of package design and advanced substrate layout for products.

What you'll do

  • Develop package design and advanced substrate layout.
  • Become proficient in EDA layout tools (e.g., Cadence SIP/Allegro) for package and substrate drawing and design modifications.
  • Perform basic routing planning, layer stack-up configuration, and design-for-manufacturability (DFM) checks.
  • Collaborate with cross-functional engineering teams to support package structure evaluations, design updates, and issue resolution.

What you'll need

  • Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, Materials Science, Mechanical Engineering, Physics, or other related engineering/science fields.
  • Strong willingness to learn package design workflows, substrate layout methodologies, and relevant EDA tools.
  • Strong analytical and problem-solving abilities.
  • Ability to organize and prepare technical documentation and follow design guidelines.
  • Capability to collaborate with global teams and interface with external suppliers.
  • Understanding of manufacturing and process requirements.

Nice to have

  • Coursework, project experience, or internships related to semiconductor packaging, electronics design, or PCB/substrate design.
  • Experience with any EDA or CAD design software (e.g., Cadence, AutoCAD, Altium, Mentor).

Skills: substrate design and layout, package structure evaluations, PCB/substrate design, EDA or CAD design software, manufacturing and process requirements

Market context

This role has been open 9 days — well below the 66-day median for Packaging Engineering roles.

Packaging Engineering · Packaging

Open roles in category
196
Median days open
66 d
Median salary
$166k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How SanDisk compares in Packaging Engineering hiring
Metric SanDisk All employers we track in this specialty (196 roles · 41 employers)
Open roles in this specialty 6 196
Open roles in the wider Process, Fab & Equipment family 74 9314 · 108 employers
Median days open 50 d 66 d (−16 d vs this employer)
Median salary (USD postings) — $166k

Skills observed across this category: substrate design and layout, package structure evaluations, PCB/substrate design, EDA or CAD design software, manufacturing and process requirements

Who's hiring in this category

  • Infineon Technologies · 27 open roles · median 31 d
  • Micron Technology · 19 open roles · median 142 d
  • Renesas Electronics · 19 open roles · median 24 d
  • Intel Corporation · 12 open roles · median 148 d
  • Monolithic Power Systems · 12 open roles · median 184 d
  • onsemi · 7 open roles · median 64 d

How we counted: 196 open Packaging Engineering (Packaging) roles from 41 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.

SanDisk

SanDisk

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Taichung, Taiwan
On-site
Full-time
24 days ago

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