Package Pathfinding Architect, MTS - MSB, Singapore
Originally posted 4 September 2026 by the employer — open 18 days.
About the role
What you'll do
- Lead cross-stack co-optimization across silicon, package, board, and system with a package-centric solutions approach.
- Drive long-term memory technology packaging strategy and influence industry standards.
- Develop AI based EDA and internal automation tool sets for enhancing design cycle efficiency.
- Develop measurement automation for incoming substrate materials.
What you'll need
- Master’s degree or equivalent degree and industry experience in EE, CE, CS, or related field.
- At least 5 years of relevant industry experience in package design, electrical simulations, and tools like Ansys, Siemens, and Cadence.
- Extensive hands-on experience in memory systems package design, signaling, IO design, and PDN design.
- Deep understanding of memory timing, signaling, power, and package process technology.
- Working knowledge of EDA tools for design, analysis, and simulation of electronic packaging, including Cadence, Siemens, and Ansys tools.
- Experience applying AI or LLMs for engineering efficiency.
Nice to have
- PhD in a related technical field.
- Experience in Signal and Power integrity analysis, mechanical and reliability analysis, and thermal analysis.
- Expertise in memory systems architecture.
- Familiarity with signal and power integrity concepts and tools.
- Proficiency in data analysis tools such as JMP, Python, or MATLAB.
Skills: package pathfinding, system architectures, memory technology packaging, signal integrity, power integrity, AI based EDA
This role has been open 18 days — well below the 39-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
66
|
Median days open
39 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (66 roles · 24 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 66 |
| Median days open | 144 d | 39 d (+105 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: package pathfinding, system architectures, memory technology packaging, signal integrity, power integrity, AI based EDA
Who's hiring in this category
- Micron Technology (this employer) · 13 open roles · median 144 d
- AMD · 6 open roles · median 28 d
- Marvell Technology · 6 open roles · median 14 d
- Broadcom · 5 open roles · median 164 d
- NVIDIA · 5 open roles · median 39 d
- Amazon · 3 open roles · median 13 d
How we counted: 66 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 24 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.